bool "Support socrates"
select ARCH_MPC8544
-config TARGET_B4420QDS
- bool "Support B4420QDS"
- select ARCH_B4420
- select SUPPORT_SPL
- select PHYS_64BIT
- imply PANIC_HANG
-
-config TARGET_B4860QDS
- bool "Support B4860QDS"
- select ARCH_B4860
- select BOARD_LATE_INIT if CHAIN_OF_TRUST
- select SUPPORT_SPL
- select PHYS_64BIT
- select FSL_DDR_INTERACTIVE if !SPL_BUILD
- imply PANIC_HANG
-
-config TARGET_BSC9131RDB
- bool "Support BSC9131RDB"
- select ARCH_BSC9131
- select SUPPORT_SPL
- select BOARD_EARLY_INIT_F
-
config TARGET_BSC9132QDS
bool "Support BSC9132QDS"
select ARCH_BSC9132
select PHYS_64BIT
select FSL_DDR_FIRST_SLOT_QUAD_CAPABLE
select FSL_DDR_INTERACTIVE
+ imply CMD_SATA
config TARGET_T2080RDB
bool "Support T2080RDB"
select SUPPORT_SPL
select PHYS_64BIT
imply CMD_SATA
- imply FSL_SATA
imply PANIC_HANG
config TARGET_T2081QDS
select FSL_LAW
select SYS_FSL_DDR_VER_50
select SYS_FSL_ERRATUM_A008378
+ select SYS_FSL_ERRATUM_A008109
select SYS_FSL_ERRATUM_A009663
select SYS_FSL_ERRATUM_A009942
select SYS_FSL_ERRATUM_ESDHC111
select FSL_LAW
select SYS_FSL_DDR_VER_50
select SYS_FSL_ERRATUM_A008378
+ select SYS_FSL_ERRATUM_A008109
select SYS_FSL_ERRATUM_A009663
select SYS_FSL_ERRATUM_A009942
select SYS_FSL_ERRATUM_ESDHC111
select SYS_FSL_DDR_VER_50
select SYS_FSL_ERRATUM_A008044
select SYS_FSL_ERRATUM_A008378
+ select SYS_FSL_ERRATUM_A008109
select SYS_FSL_ERRATUM_A009663
select SYS_FSL_ERRATUM_A009942
select SYS_FSL_ERRATUM_ESDHC111
select SYS_FSL_DDR_VER_50
select SYS_FSL_ERRATUM_A008044
select SYS_FSL_ERRATUM_A008378
+ select SYS_FSL_ERRATUM_A008109
select SYS_FSL_ERRATUM_A009663
select SYS_FSL_ERRATUM_A009942
select SYS_FSL_ERRATUM_ESDHC111
select SYS_FSL_ERRATUM_A007212
select SYS_FSL_ERRATUM_A007815
select SYS_FSL_ERRATUM_A007907
+ select SYS_FSL_ERRATUM_A008109
select SYS_FSL_ERRATUM_A009942
select SYS_FSL_ERRATUM_ESDHC111
select FSL_PCIE_RESET
select SYS_FSL_SEC_COMPAT_4
select SYS_PPC64
select FSL_IFC
+ imply CMD_SATA
imply CMD_NAND
imply CMD_REGINFO
+ imply FSL_SATA
config ARCH_T2081
bool
select SYS_FSL_ERRATUM_A007798
select SYS_FSL_ERRATUM_A007815
select SYS_FSL_ERRATUM_A007907
+ select SYS_FSL_ERRATUM_A008109
select SYS_FSL_ERRATUM_A009942
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_SEC
Defines divider of platform clock(clock input to
eLBC controller).
-source "board/freescale/b4860qds/Kconfig"
-source "board/freescale/bsc9131rdb/Kconfig"
source "board/freescale/bsc9132qds/Kconfig"
source "board/freescale/c29xpcie/Kconfig"
source "board/freescale/corenet_ds/Kconfig"