nds32: ftmac100 support cache enable.

[platform/kernel/u-boot.git] / arch / nds32 / include / asm / io.h

diff --git a/arch/nds32/include/asm/io.h b/arch/nds32/include/asm/io.h
index 2c105f7..e8ee961 100644 (file)
--- a/arch/nds32/include/asm/io.h
+++ b/arch/nds32/include/asm/io.h
@@ -7,9 +7,7 @@
  * Shawn Lin, Andes Technology Corporation <nobuhiro@andestech.com>
  * Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com>
  *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
+ * SPDX-License-Identifier:    GPL-2.0
  *
  * Modifications:
  *  16-Sep-1996        RMK     Inlined the inx/outx functions & optimised for both
@@ -50,6 +48,27 @@ static inline void sync(void)
 #define MAP_WRBACK     (0)
 #define MAP_WRTHROUGH  (0)
 
+#ifdef CONFIG_ARCH_MAP_SYSMEM
+static inline void *map_sysmem(phys_addr_t paddr, unsigned long len)
+{
+       if(paddr <PHYS_SDRAM_0_SIZE + PHYS_SDRAM_1_SIZE)
+       paddr = paddr | 0x40000000;
+       return (void *)(uintptr_t)paddr;
+}
+
+static inline void *unmap_sysmem(const void *vaddr)
+{
+       phys_addr_t paddr = (phys_addr_t)vaddr;
+       paddr = paddr & ~0x40000000;
+       return (void *)(uintptr_t)paddr;
+}
+
+static inline phys_addr_t map_to_sysmem(const void *ptr)
+{
+       return (phys_addr_t)(uintptr_t)ptr;
+}
+#endif
+
 static inline void *
 map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)
 {
@@ -165,6 +184,61 @@ static inline unsigned int readl(unsigned int *addr)
 #define __raw_base_readw(base, off)    __arch_base_getw(base, off)
 #define __raw_base_readl(base, off)    __arch_base_getl(base, off)
 
+#define out_arch(type, endian, a, v)   __raw_write##type(cpu_to_##endian(v), a)
+#define in_arch(type, endian, a)       endian##_to_cpu(__raw_read##type(a))
+
+#define out_le32(a, v)                 out_arch(l, le32, a, v)
+#define out_le16(a, v)                 out_arch(w, le16, a, v)
+
+#define in_le32(a)                     in_arch(l, le32, a)
+#define in_le16(a)                     in_arch(w, le16, a)
+
+#define out_be32(a, v)                 out_arch(l, be32, a, v)
+#define out_be16(a, v)                 out_arch(w, be16, a, v)
+
+#define in_be32(a)                     in_arch(l, be32, a)
+#define in_be16(a)                     in_arch(w, be16, a)
+
+#define out_8(a, v)                    __raw_writeb(v, a)
+#define in_8(a)                                __raw_readb(a)
+
+/*
+ * Clear and set bits in one shot. These macros can be used to clear and
+ * set multiple bits in a register using a single call. These macros can
+ * also be used to set a multiple-bit bit pattern using a mask, by
+ * specifying the mask in the 'clear' parameter and the new bit pattern
+ * in the 'set' parameter.
+ */
+
+#define clrbits(type, addr, clear) \
+       out_##type((addr), in_##type(addr) & ~(clear))
+
+#define setbits(type, addr, set) \
+       out_##type((addr), in_##type(addr) | (set))
+
+#define clrsetbits(type, addr, clear, set) \
+       out_##type((addr), (in_##type(addr) & ~(clear)) | (set))
+
+#define clrbits_be32(addr, clear) clrbits(be32, addr, clear)
+#define setbits_be32(addr, set) setbits(be32, addr, set)
+#define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set)
+
+#define clrbits_le32(addr, clear) clrbits(le32, addr, clear)
+#define setbits_le32(addr, set) setbits(le32, addr, set)
+#define clrsetbits_le32(addr, clear, set) clrsetbits(le32, addr, clear, set)
+
+#define clrbits_be16(addr, clear) clrbits(be16, addr, clear)
+#define setbits_be16(addr, set) setbits(be16, addr, set)
+#define clrsetbits_be16(addr, clear, set) clrsetbits(be16, addr, clear, set)
+
+#define clrbits_le16(addr, clear) clrbits(le16, addr, clear)
+#define setbits_le16(addr, set) setbits(le16, addr, set)
+#define clrsetbits_le16(addr, clear, set) clrsetbits(le16, addr, clear, set)
+
+#define clrbits_8(addr, clear) clrbits(8, addr, clear)
+#define setbits_8(addr, set) setbits(8, addr, set)
+#define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set)
+
 /*
  * Now, pick up the machine-defined IO definitions
  * #include <asm/arch/io.h>
@@ -291,40 +365,6 @@ static inline void writesl(unsigned int *addr, const void * data, int longlen)
 #define insl_p(port, to, len)          insl(port, to, len)
 
 /*
- * ioremap and friends.
- *
- * ioremap takes a PCI memory address, as specified in
- * linux/Documentation/IO-mapping.txt.  If you want a
- * physical address, use __ioremap instead.
- */
-extern void *__ioremap(unsigned long offset, size_t size, unsigned long flags);
-extern void __iounmap(void *addr);
-
-/*
- * Generic ioremap support.
- *
- * Define:
- *  iomem_valid_addr(off,size)
- *  iomem_to_phys(off)
- */
-#ifdef iomem_valid_addr
-#define __arch_ioremap(off, sz, nocache)                               \
-({                                                                     \
-       unsigned long _off = (off), _size = (sz);                       \
-       void *_ret = (void *)0;                                         \
-       if (iomem_valid_addr(_off, _size))                              \
-               _ret = __ioremap(iomem_to_phys(_off), _size, 0);        \
-       _ret;                                                           \
-})
-
-#define __arch_iounmap __iounmap
-#endif
-
-#define ioremap(off, sz)               __arch_ioremap((off), (sz), 0)
-#define ioremap_nocache(off, sz)       __arch_ioremap((off), (sz), 1)
-#define iounmap(_addr)                 __arch_iounmap(_addr)
-
-/*
  * DMA-consistent mapping functions.  These allocate/free a region of
  * uncached, unwrite-buffered mapped memory space for use with DMA
  * devices.  This is the "generic" version.  The PCI specific version