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Convert CONFIG_SKIP_LOWLEVEL_INIT et al to Kconfig
[platform/kernel/u-boot.git] / arch / nds32 / cpu / n1213 / ag101 / lowlevel_init.S
diff --git a/arch/nds32/cpu/n1213/ag101/lowlevel_init.S b/arch/nds32/cpu/n1213/ag101/lowlevel_init.S
index 810326d..ce5fefd 100644 (file)
--- a/arch/nds32/cpu/n1213/ag101/lowlevel_init.S
+++ b/arch/nds32/cpu/n1213/ag101/lowlevel_init.S
@@ -1,11 +1,12 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright (C) 2011 Andes Technology Corporation
  * Shawn Lin, Andes Technology Corporation <nobuhiro@andestech.com>
  * Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com>
- *
- * SPDX-License-Identifier:    GPL-2.0+
  */
 
+.pic
+
 .text
 
 #include <common.h>
@@ -32,6 +33,15 @@
 #define SDMC_B0_BSR_D          CONFIG_SYS_FTSDMC021_BANK0_BSR
 #define SDMC_B1_BSR_D          CONFIG_SYS_FTSDMC021_BANK1_BSR
 
+
+/*
+ * for Orca and Emerald
+ */
+#define BOARD_ID_REG           0x104
+#define BOARD_ID_FAMILY_MASK   0xfff000
+#define BOARD_ID_FAMILY_V5     0x556000
+#define BOARD_ID_FAMILY_K7     0x74b000
+
 /*
  * parameters for the static memory controller
  */
@@ -47,6 +57,10 @@
 #define AHBC_CR_A              (CONFIG_FTAHBC020S_BASE + FTAHBC020S_CR)
 #define AHBC_BSR6_A    (CONFIG_FTAHBC020S_BASE + FTAHBC020S_SLAVE_BSR_6)
 
+/*
+ * for Orca and Emerald
+ */
+#define AHBC_BSR4_A    (CONFIG_FTAHBC020S_BASE + FTAHBC020S_SLAVE_BSR_4)
 #define AHBC_BSR6_D            CONFIG_SYS_FTAHBC020S_SLAVE_BSR_6
 
 /*
@@ -71,25 +85,7 @@
        bnez    $r1, 1b
 .endm
 
-#ifndef CONFIG_SKIP_LOWLEVEL_INIT
-.globl lowlevel_init
-lowlevel_init:
-       move    $r10, $lp
-
-       led     0x0
-       jal     mem_init
-
-       led     0x10
-       jal     remap
-
-#if (defined(NDS32_EXT_FPU_DP) || defined(NDS32_EXT_FPU_SP))
-       led     0x1f
-       jal     enable_fpu
-#endif
-
-       led     0x20
-       ret     $r10
-
+.globl mem_init
 mem_init:
        move    $r11, $lp
 
@@ -100,14 +96,39 @@ mem_init:
         *      we need to set onboard SDRAM before remap and relocation.
         */
        led     0x01
-       write32 SMC_BANK0_CR_A, SMC_BANK0_CR_D                  ! 0x10000052
-       write32 SMC_BANK0_TPR_A, SMC_BANK0_TPR_D                ! 0x00151151
 
-       /*
-        * config AHB Controller
-        */
+  /*
+   * for Orca and Emerald
+   * disable write protection and reset bank size
+   */
+       li      $r0, SMC_BANK0_CR_A
+       lwi $r1, [$r0+#0x00]
+       ori $r1, $r1, 0x8f0
+       xori $r1, $r1, 0x8f0
+       /* check board */
+       li      $r3, CONFIG_FTPMU010_BASE + BOARD_ID_REG
+  lwi     $r3, [$r3]
+  li      $r4, BOARD_ID_FAMILY_MASK
+  and     $r3, $r3, $r4
+  li      $r4, BOARD_ID_FAMILY_K7
+  xor     $r4, $r3, $r4
+  beqz    $r4, use_flash_16bit_boot
+       /* 32-bit mode */
+use_flash_32bit_boot:
+       ori     $r1, $r1, 0x50
+  li      $r2, 0x00151151
+  j       sdram_b0_cr
+       /* 16-bit mode */
+use_flash_16bit_boot:
+  ori     $r1, $r1, 0x60
+  li      $r2, 0x00153153
+       /* SRAM bank0 config */
+sdram_b0_cr:
+  swi     $r1, [$r0+#0x00]
+  swi     $r2, [$r0+#0x04]
+
+       /* config AHB Controller */
        led     0x02
-       write32 AHBC_BSR6_A, AHBC_BSR6_D
 
        /*
         * config PMU controller
@@ -142,6 +163,21 @@ mem_init:
        move    $lp, $r11
        ret
 
+
+#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT)
+
+.globl lowlevel_init
+lowlevel_init:
+       move    $r10, $lp
+       led     0x10
+       jal     remap
+#if (defined(NDS32_EXT_FPU_DP) || defined(NDS32_EXT_FPU_SP))
+       led     0x1f
+       jal     enable_fpu
+#endif
+       led     0x20
+       ret     $r10
+
 remap:
        move    $r11, $lp
 #ifdef __NDS32_N1213_43U1H__   /* NDS32 V0 ISA - AG101 Only */
@@ -153,12 +189,10 @@ relo_base:
        mfusr   $r0, $pc
 #endif /* __NDS32_N1213_43U1H__ */
 
-       /*
-        * Remapping
-        */
+       /* Remapping */
        led     0x1a
-       write32 SDMC_B0_BSR_A, SDMC_B0_BSR_D            ! 0x00001100
-       write32 SDMC_B1_BSR_A, SDMC_B1_BSR_D            ! 0x00001140
+       write32 SDMC_B0_BSR_A, SDMC_B0_BSR_D            ! 0x00001800
+       write32 SDMC_B1_BSR_A, SDMC_B1_BSR_D            ! 0x00001880
 
        /* clear empty BSR registers */
        led     0x1b
@@ -194,13 +228,17 @@ relo_base:
         * a FLASH connected to bank0.
         */
        led     0x11
-       li      $r4, PHYS_SDRAM_0_AT_INIT               /* 0x10000000 */
-       li      $r5, 0x0
-       la      $r1, relo_base                          /* get $pc or $lp */
-       sub     $r2, $r0, $r1
-       sethi   $r6, hi20(_end)
-       ori     $r6, $r6, lo12(_end)
-       add     $r6, $r6, $r2
+   /*
+    * for Orca and Emerald
+    * read sdram base address automatically
+    */
+       li      $r5, AHBC_BSR6_A
+       lwi $r8, [$r5]
+       li      $r4, 0xfff00000   /* r4 = bank6 base */
+       and $r4, $r4, $r8
+
+       la      $r5, _start@GOTOFF
+       la  $r6, _end@GOTOFF
 1:
        lwi.p   $r7, [$r5], #4
        swi.p   $r7, [$r4], #4
@@ -215,11 +253,38 @@ relo_base:
         */
        led     0x1c
        write32 SDMC_B0_BSR_A, 0x00001000
-       write32 SDMC_B1_BSR_A, 0x00001040
+       write32 SDMC_B1_BSR_A, 0x00001200
+       li $r5, CONFIG_SYS_TEXT_BASE    /* flash base address */
+       add $r11, $r11, $r5     /* add flash address offset for ret */
+       add $r10, $r10, $r5
+       move $lp, $r11
        setbf15 AHBC_CR_A, FTAHBC020S_CR_REMAP          ! 0x1
 
+  /*
+   * for Orca and Emerald
+   * extend sdram size from 256MB to 2GB
+   */
+       li      $r5, AHBC_BSR6_A
+       lwi $r6, [$r5]
+       li  $r4, 0xfff0ffff
+       and $r6 ,$r4, $r6
+       li      $r4, 0x000b0000
+       or  $r6, $r4, $r6
+       swi     $r6, [$r5]
+
+  /*
+   * for Orca and Emerald
+   * extend rom base from 256MB to 2GB
+   */
+       li      $r4, AHBC_BSR4_A
+       lwi $r5, [$r4]
+       li      $r6, 0xffffff
+       and $r5, $r5, $r6
+       li  $r6, 0x80000000
+       or  $r5, $r5, $r6
+       swi $r5,        [$r4]
 #endif /* #ifdef CONFIG_MEM_REMAP */
-       move    $lp, $r11
+       move $lp, $r11
 2:
        ret
 
@@ -249,4 +314,4 @@ show_led:
     li      $r8, (CONFIG_DEBUG_LED)
     swi     $r7, [$r8]
     ret
-#endif /* #ifndef CONFIG_SKIP_LOWLEVEL_INIT */
+#endif /* #if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT) */
Domain: System / Kernel;