mips: ralink: mt7621: do not use kzalloc too early

[platform/kernel/linux-starfive.git] / arch / mips / ralink / mt7621.c

diff --git a/arch/mips/ralink/mt7621.c b/arch/mips/ralink/mt7621.c
index fb0565b..bbf5811 100644 (file)
--- a/arch/mips/ralink/mt7621.c
+++ b/arch/mips/ralink/mt7621.c
@@ -25,6 +25,7 @@
 #define MT7621_MEM_TEST_PATTERN         0xaa5555aa
 
 static u32 detect_magic __initdata;
+static struct ralink_soc_info *soc_info_ptr;
 
 int pcibios_root_bridge_prepare(struct pci_host_bridge *bridge)
 {
@@ -97,41 +98,83 @@ void __init ralink_of_remap(void)
                panic("Failed to remap core resources");
 }
 
-static void soc_dev_init(struct ralink_soc_info *soc_info, u32 rev)
+static unsigned int __init mt7621_get_soc_name0(void)
+{
+       return __raw_readl(MT7621_SYSC_BASE + SYSC_REG_CHIP_NAME0);
+}
+
+static unsigned int __init mt7621_get_soc_name1(void)
+{
+       return __raw_readl(MT7621_SYSC_BASE + SYSC_REG_CHIP_NAME1);
+}
+
+static bool __init mt7621_soc_valid(void)
+{
+       if (mt7621_get_soc_name0() == MT7621_CHIP_NAME0 &&
+                       mt7621_get_soc_name1() == MT7621_CHIP_NAME1)
+               return true;
+       else
+               return false;
+}
+
+static const char __init *mt7621_get_soc_id(void)
+{
+       if (mt7621_soc_valid())
+               return "MT7621";
+       else
+               return "invalid";
+}
+
+static unsigned int __init mt7621_get_soc_rev(void)
+{
+       return __raw_readl(MT7621_SYSC_BASE + SYSC_REG_CHIP_REV);
+}
+
+static unsigned int __init mt7621_get_soc_ver(void)
+{
+       return (mt7621_get_soc_rev() >> CHIP_REV_VER_SHIFT) & CHIP_REV_VER_MASK;
+}
+
+static unsigned int __init mt7621_get_soc_eco(void)
+{
+       return (mt7621_get_soc_rev() & CHIP_REV_ECO_MASK);
+}
+
+static const char __init *mt7621_get_soc_revision(void)
+{
+       if (mt7621_get_soc_rev() == 1 && mt7621_get_soc_eco() == 1)
+               return "E2";
+       else
+               return "E1";
+}
+
+static int __init mt7621_soc_dev_init(void)
 {
        struct soc_device *soc_dev;
        struct soc_device_attribute *soc_dev_attr;
 
        soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
        if (!soc_dev_attr)
-               return;
+               return -ENOMEM;
 
        soc_dev_attr->soc_id = "mt7621";
        soc_dev_attr->family = "Ralink";
+       soc_dev_attr->revision = mt7621_get_soc_revision();
 
-       if (((rev >> CHIP_REV_VER_SHIFT) & CHIP_REV_VER_MASK) == 1 &&
-           (rev & CHIP_REV_ECO_MASK) == 1)
-               soc_dev_attr->revision = "E2";
-       else
-               soc_dev_attr->revision = "E1";
-
-       soc_dev_attr->data = soc_info;
+       soc_dev_attr->data = soc_info_ptr;
 
        soc_dev = soc_device_register(soc_dev_attr);
        if (IS_ERR(soc_dev)) {
                kfree(soc_dev_attr);
-               return;
+               return PTR_ERR(soc_dev);
        }
+
+       return 0;
 }
+device_initcall(mt7621_soc_dev_init);
 
 void __init prom_soc_init(struct ralink_soc_info *soc_info)
 {
-       void __iomem *sysc = (void __iomem *) KSEG1ADDR(MT7621_SYSC_BASE);
-       unsigned char *name = NULL;
-       u32 n0;
-       u32 n1;
-       u32 rev;
-
        /* Early detection of CMP support */
        mips_cm_probe();
        mips_cpc_probe();
@@ -154,27 +197,23 @@ void __init prom_soc_init(struct ralink_soc_info *soc_info)
                __sync();
        }
 
-       n0 = __raw_readl(sysc + SYSC_REG_CHIP_NAME0);
-       n1 = __raw_readl(sysc + SYSC_REG_CHIP_NAME1);
-
-       if (n0 == MT7621_CHIP_NAME0 && n1 == MT7621_CHIP_NAME1) {
-               name = "MT7621";
+       if (mt7621_soc_valid())
                soc_info->compatible = "mediatek,mt7621-soc";
-       } else {
-               panic("mt7621: unknown SoC, n0:%08x n1:%08x\n", n0, n1);
-       }
+       else
+               panic("mt7621: unknown SoC, n0:%08x n1:%08x\n",
+                               mt7621_get_soc_name0(),
+                               mt7621_get_soc_name1());
        ralink_soc = MT762X_SOC_MT7621AT;
-       rev = __raw_readl(sysc + SYSC_REG_CHIP_REV);
 
        snprintf(soc_info->sys_type, RAMIPS_SYS_TYPE_LEN,
                "MediaTek %s ver:%u eco:%u",
-               name,
-               (rev >> CHIP_REV_VER_SHIFT) & CHIP_REV_VER_MASK,
-               (rev & CHIP_REV_ECO_MASK));
+               mt7621_get_soc_id(),
+               mt7621_get_soc_ver(),
+               mt7621_get_soc_eco());
 
        soc_info->mem_detect = mt7621_memory_detect;
 
-       soc_dev_init(soc_info, rev);
+       soc_info_ptr = soc_info;
 
        if (!register_cps_smp_ops())
                return;