Merge tag 'u-boot-atmel-fixes-2021.01-b' of https://gitlab.denx.de/u-boot/custodians...

[platform/kernel/u-boot.git] / arch / mips / mach-octeon / dram.c

diff --git a/arch/mips/mach-octeon/dram.c b/arch/mips/mach-octeon/dram.c
index ff7a59f..4679260 100644 (file)
--- a/arch/mips/mach-octeon/dram.c
+++ b/arch/mips/mach-octeon/dram.c
@@ -1,28 +1,89 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
- * Copyright (C) Stefan Roese <sr@denx.de>
+ * Copyright (C) 2020 Stefan Roese <sr@denx.de>
  */
 
+#include <config.h>
 #include <dm.h>
 #include <ram.h>
 #include <asm/global_data.h>
 #include <linux/compat.h>
+#include <display_options.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#define UBOOT_RAM_SIZE_MAX     0x10000000ULL
+
 int dram_init(void)
 {
-       /*
-        * No DDR init yet -> run in L2 cache
-        */
-       gd->ram_size = (4 << 20);
-       gd->bd->bi_dram[0].size = gd->ram_size;
-       gd->bd->bi_dram[1].size = 0;
+       if (IS_ENABLED(CONFIG_RAM_OCTEON)) {
+               struct ram_info ram;
+               struct udevice *dev;
+               int ret;
+
+               ret = uclass_get_device(UCLASS_RAM, 0, &dev);
+               if (ret) {
+                       debug("DRAM init failed: %d\n", ret);
+                       return ret;
+               }
+
+               ret = ram_get_info(dev, &ram);
+               if (ret) {
+                       debug("Cannot get DRAM size: %d\n", ret);
+                       return ret;
+               }
+
+               gd->ram_size = ram.size;
+               debug("SDRAM base=%lx, size=%lx\n",
+                     (unsigned long)ram.base, (unsigned long)ram.size);
+       } else {
+               /*
+                * No DDR init yet -> run in L2 cache
+                */
+               gd->ram_size = (4 << 20);
+               gd->bd->bi_dram[0].size = gd->ram_size;
+               gd->bd->bi_dram[1].size = 0;
+       }
 
        return 0;
 }
 
+void board_add_ram_info(int use_default)
+{
+       if (IS_ENABLED(CONFIG_RAM_OCTEON)) {
+               struct ram_info ram;
+               struct udevice *dev;
+               int ret;
+
+               ret = uclass_get_device(UCLASS_RAM, 0, &dev);
+               if (ret) {
+                       debug("DRAM init failed: %d\n", ret);
+                       return;
+               }
+
+               ret = ram_get_info(dev, &ram);
+               if (ret) {
+                       debug("Cannot get DRAM size: %d\n", ret);
+                       return;
+               }
+
+               printf(" (");
+               print_size(ram.size, " total)");
+       }
+}
+
+phys_size_t get_effective_memsize(void)
+{
+       return UBOOT_RAM_SIZE_MAX;
+}
+
 ulong board_get_usable_ram_top(ulong total_size)
 {
-       return gd->ram_top;
+       if (IS_ENABLED(CONFIG_RAM_OCTEON)) {
+               /* Map a maximum of 256MiB - return not size but address */
+               return CONFIG_SYS_SDRAM_BASE + min(gd->ram_size,
+                                                  UBOOT_RAM_SIZE_MAX);
+       } else {
+               return gd->ram_top;
+       }
 }