Merge tag 'xilinx-for-v2020.07-rc2' of https://gitlab.denx.de/u-boot/custodians/u...

[platform/kernel/u-boot.git] / arch / mips / include / asm / global_data.h

diff --git a/arch/mips/include/asm/global_data.h b/arch/mips/include/asm/global_data.h
index f912428..4c30fab 100644 (file)
--- a/arch/mips/include/asm/global_data.h
+++ b/arch/mips/include/asm/global_data.h
@@ -1,24 +1,7 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * (C) Copyright 2002-2010
  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
  */
 
 #ifndef        __ASM_GBL_DATA_H
@@ -28,13 +11,24 @@
 
 /* Architecture-specific global data */
 struct arch_global_data {
-#ifdef CONFIG_JZSOC
-       /* There are other clocks in the jz4740 */
-       unsigned long per_clk;  /* Peripheral bus clock */
-       unsigned long dev_clk;  /* Device clock */
-       unsigned long sys_clk;
-       unsigned long tbl;
-       unsigned long lastinc;
+#ifdef CONFIG_DYNAMIC_IO_PORT_BASE
+       unsigned long io_port_base;
+#endif
+#ifdef CONFIG_ARCH_ATH79
+       unsigned long id;
+       unsigned long soc;
+       unsigned long rev;
+       unsigned long ver;
+#endif
+#ifdef CONFIG_SYS_CACHE_SIZE_AUTO
+       unsigned short l1i_line_size;
+       unsigned short l1d_line_size;
+#endif
+#ifdef CONFIG_MIPS_L2_CACHE
+       unsigned short l2_line_size;
+#endif
+#ifdef CONFIG_ARCH_MTMIPS
+       unsigned long timer_freq;
 #endif
 };