Finish converting CONFIG_SYS_CACHELINE_SIZE to Kconfig

[platform/kernel/u-boot.git] / arch / mips / include / asm / cache.h

diff --git a/arch/mips/include/asm/cache.h b/arch/mips/include/asm/cache.h
index 669c362..d3e8a8c 100644 (file)
--- a/arch/mips/include/asm/cache.h
+++ b/arch/mips/include/asm/cache.h
@@ -1,24 +1,14 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright (c) 2011 The Chromium OS Authors.
- *
- * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #ifndef __MIPS_CACHE_H__
 #define __MIPS_CACHE_H__
 
-#define L1_CACHE_SHIFT         CONFIG_MIPS_L1_CACHE_SHIFT
-#define L1_CACHE_BYTES         (1 << L1_CACHE_SHIFT)
-
-#define ARCH_DMA_MINALIGN      (L1_CACHE_BYTES)
-
-/*
- * CONFIG_SYS_CACHELINE_SIZE is still used in various drivers primarily for
- * DMA buffer alignment. Satisfy those drivers by providing it as a synonym
- * of ARCH_DMA_MINALIGN for now.
- */
-#define CONFIG_SYS_CACHELINE_SIZE ARCH_DMA_MINALIGN
+#define ARCH_DMA_MINALIGN      CONFIG_SYS_CACHELINE_SIZE
 
+#ifndef __ASSEMBLY__
 /**
  * mips_cache_probe() - Probe the properties of the caches
  *
@@ -27,5 +17,6 @@
  * functions such as flush_cache may be called.
  */
 void mips_cache_probe(void);
+#endif
 
 #endif /* __MIPS_CACHE_H__ */