Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus

[platform/kernel/linux-starfive.git] / arch / mips / cavium-octeon / crypto / octeon-crypto.h

diff --git a/arch/mips/cavium-octeon/crypto/octeon-crypto.h b/arch/mips/cavium-octeon/crypto/octeon-crypto.h
index 3550725..7315cc3 100644 (file)
--- a/arch/mips/cavium-octeon/crypto/octeon-crypto.h
+++ b/arch/mips/cavium-octeon/crypto/octeon-crypto.h
@@ -33,7 +33,7 @@ do {                                                  \
        __asm__ __volatile__ (                          \
        "dmtc2 %[rt],0x0048+" STR(index)                \
        :                                               \
-       : [rt] "d" (value));                            \
+       : [rt] "d" (cpu_to_be64(value)));               \
 } while (0)
 
 /*
@@ -48,7 +48,7 @@ do {                                                  \
        : [rt] "=d" (__value)                           \
        : );                                            \
                                                        \
-       __value;                                        \
+       be64_to_cpu(__value);                           \
 })
 
 /*
@@ -59,7 +59,7 @@ do {                                                  \
        __asm__ __volatile__ (                          \
        "dmtc2 %[rt],0x0040+" STR(index)                \
        :                                               \
-       : [rt] "d" (value));                            \
+       : [rt] "d" (cpu_to_be64(value)));               \
 } while (0)
 
 /*
@@ -70,6 +70,80 @@ do {                                                 \
        __asm__ __volatile__ (                          \
        "dmtc2 %[rt],0x4047"                            \
        :                                               \
+       : [rt] "d" (cpu_to_be64(value)));               \
+} while (0)
+
+/*
+ * The value is the final block dword (64-bit).
+ */
+#define octeon_sha1_start(value)                       \
+do {                                                   \
+       __asm__ __volatile__ (                          \
+       "dmtc2 %[rt],0x4057"                            \
+       :                                               \
+       : [rt] "d" (value));                            \
+} while (0)
+
+/*
+ * The value is the final block dword (64-bit).
+ */
+#define octeon_sha256_start(value)                     \
+do {                                                   \
+       __asm__ __volatile__ (                          \
+       "dmtc2 %[rt],0x404f"                            \
+       :                                               \
+       : [rt] "d" (value));                            \
+} while (0)
+
+/*
+ * Macros needed to implement SHA512:
+ */
+
+/*
+ * The index can be 0-7.
+ */
+#define write_octeon_64bit_hash_sha512(value, index)   \
+do {                                                   \
+       __asm__ __volatile__ (                          \
+       "dmtc2 %[rt],0x0250+" STR(index)                \
+       :                                               \
+       : [rt] "d" (value));                            \
+} while (0)
+
+/*
+ * The index can be 0-7.
+ */
+#define read_octeon_64bit_hash_sha512(index)           \
+({                                                     \
+       u64 __value;                                    \
+                                                       \
+       __asm__ __volatile__ (                          \
+       "dmfc2 %[rt],0x0250+" STR(index)                \
+       : [rt] "=d" (__value)                           \
+       : );                                            \
+                                                       \
+       __value;                                        \
+})
+
+/*
+ * The index can be 0-14.
+ */
+#define write_octeon_64bit_block_sha512(value, index)  \
+do {                                                   \
+       __asm__ __volatile__ (                          \
+       "dmtc2 %[rt],0x0240+" STR(index)                \
+       :                                               \
+       : [rt] "d" (value));                            \
+} while (0)
+
+/*
+ * The value is the final block word (64-bit).
+ */
+#define octeon_sha512_start(value)                     \
+do {                                                   \
+       __asm__ __volatile__ (                          \
+       "dmtc2 %[rt],0x424f"                            \
+       :                                               \
        : [rt] "d" (value));                            \
 } while (0)