MIPS: BCM63XX: Add support for bcm6368 CPU.
[platform/adaptation/renesas_rcar/renesas_kernel.git] / arch / mips / bcm63xx / irq.c
index 9f53884..9a216a4 100644 (file)
@@ -71,6 +71,17 @@ static void __internal_irq_unmask_64(unsigned int irq) __maybe_unused;
 #define ext_irq_cfg_reg1       PERF_EXTIRQ_CFG_REG_6358
 #define ext_irq_cfg_reg2       0
 #endif
+#ifdef CONFIG_BCM63XX_CPU_6368
+#define irq_stat_reg           PERF_IRQSTAT_6368_REG
+#define irq_mask_reg           PERF_IRQMASK_6368_REG
+#define irq_bits               64
+#define is_ext_irq_cascaded    1
+#define ext_irq_start          (BCM_6368_EXT_IRQ0 - IRQ_INTERNAL_BASE)
+#define ext_irq_end            (BCM_6368_EXT_IRQ5 - IRQ_INTERNAL_BASE)
+#define ext_irq_count          6
+#define ext_irq_cfg_reg1       PERF_EXTIRQ_CFG_REG_6368
+#define ext_irq_cfg_reg2       PERF_EXTIRQ_CFG_REG2_6368
+#endif
 
 #if irq_bits == 32
 #define dispatch_internal                      __dispatch_internal
@@ -134,6 +145,17 @@ static void bcm63xx_init_irq(void)
                ext_irq_end = BCM_6358_EXT_IRQ3 - IRQ_INTERNAL_BASE;
                ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6358;
                break;
+       case BCM6368_CPU_ID:
+               irq_stat_addr += PERF_IRQSTAT_6368_REG;
+               irq_mask_addr += PERF_IRQMASK_6368_REG;
+               irq_bits = 64;
+               ext_irq_count = 6;
+               is_ext_irq_cascaded = 1;
+               ext_irq_start = BCM_6368_EXT_IRQ0 - IRQ_INTERNAL_BASE;
+               ext_irq_end = BCM_6368_EXT_IRQ5 - IRQ_INTERNAL_BASE;
+               ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6368;
+               ext_irq_cfg_reg2 = PERF_EXTIRQ_CFG_REG2_6368;
+               break;
        default:
                BUG();
        }
@@ -406,7 +428,7 @@ static int bcm63xx_external_irq_set_type(struct irq_data *d,
                        reg &= ~EXTIRQ_CFG_BOTHEDGE_6348(irq);
        }
 
-       if (BCMCPU_IS_6338() || BCMCPU_IS_6358()) {
+       if (BCMCPU_IS_6338() || BCMCPU_IS_6358() || BCMCPU_IS_6368()) {
                if (levelsense)
                        reg |= EXTIRQ_CFG_LEVELSENSE(irq);
                else