+// SPDX-License-Identifier: GPL-2.0+
/*
* (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de>
*
* (C) Copyright 2000
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
*/
#include <common.h>
+#include <irq_func.h>
+#include <time.h>
#include <asm/timer.h>
#include <asm/immap.h>
}
}
-void timer_init(void)
+int timer_init(void)
{
volatile dtmr_t *timerp = (dtmr_t *) (CONFIG_SYS_TMR_BASE);
/* set a period of 1us, set timer mode to restart and enable timer and interrupt */
timerp->tmr = CONFIG_SYS_TIMER_PRESCALER | DTIM_DTMR_CLK_DIV1 |
DTIM_DTMR_FRR | DTIM_DTMR_ORRI | DTIM_DTMR_RST_EN;
+
+ return 0;
}
ulong get_timer(ulong base)
#endif /* CONFIG_MCFTMR */
-#if defined(CONFIG_MCFPIT)
-#if !defined(CONFIG_SYS_PIT_BASE)
-# error "CONFIG_SYS_PIT_BASE not defined!"
-#endif
-
-static unsigned short lastinc;
-
-void __udelay(unsigned long usec)
-{
- volatile pit_t *timerp = (pit_t *) (CONFIG_SYS_UDELAY_BASE);
- uint tmp;
-
- while (usec > 0) {
- if (usec > 65000)
- tmp = 65000;
- else
- tmp = usec;
- usec = usec - tmp;
-
- /* Set up TIMER 3 as timebase clock */
- timerp->pcsr = PIT_PCSR_OVW;
- timerp->pmr = 0;
- /* set period to 1 us */
- timerp->pcsr |= PIT_PCSR_PRE(CONFIG_SYS_PIT_PRESCALE) | PIT_PCSR_EN;
-
- timerp->pmr = tmp;
- while (timerp->pcntr > 0) ;
- }
-}
-
-void timer_init(void)
-{
- volatile pit_t *timerp = (pit_t *) (CONFIG_SYS_PIT_BASE);
- timestamp = 0;
-
- /* Set up TIMER 4 as poll clock */
- timerp->pcsr = PIT_PCSR_OVW;
- timerp->pmr = lastinc = 0;
- timerp->pcsr |= PIT_PCSR_PRE(CONFIG_SYS_PIT_PRESCALE) | PIT_PCSR_EN;
-}
-
-ulong get_timer(ulong base)
-{
- unsigned short now, diff;
- volatile pit_t *timerp = (pit_t *) (CONFIG_SYS_PIT_BASE);
-
- now = timerp->pcntr;
- diff = -(now - lastinc);
-
- timestamp += diff;
- lastinc = now;
- return timestamp - base;
-}
-
-void wait_ticks(unsigned long ticks)
-{
- u32 start = get_timer(0);
- while (get_timer(start) < ticks) ;
-}
-#endif /* CONFIG_MCFPIT */
-
/*
* This function is derived from PowerPC code (read timebase as long long).
* On M68K it just returns the timer value.
*/
ulong get_tbclk(void)
{
- ulong tbclk;
- tbclk = CONFIG_SYS_HZ;
- return tbclk;
+ return CONFIG_SYS_HZ;
}