Merge tag 'arm-dt-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

[platform/kernel/linux-starfive.git] / arch / arm64 / boot / dts / mediatek / mt7622.dtsi

diff --git a/arch/arm64/boot/dts/mediatek/mt7622.dtsi b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
index 9768523..dbcee8b 100644 (file)
--- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
@@ -364,7 +364,7 @@
                };
 
                cci_control2: slave-if@5000 {
-                       compatible = "arm,cci-400-ctrl-if";
+                       compatible = "arm,cci-400-ctrl-if", "syscon";
                        interface-type = "ace";
                        reg = <0x5000 0x1000>;
                };
@@ -920,6 +920,11 @@
                };
        };
 
+       hifsys: syscon@1af00000 {
+               compatible = "mediatek,mt7622-hifsys", "syscon";
+               reg = <0 0x1af00000 0 0x70>;
+       };
+
        ethsys: syscon@1b000000 {
                compatible = "mediatek,mt7622-ethsys",
                             "syscon";
@@ -939,6 +944,26 @@
                dma-requests = <3>;
        };
 
+       pcie_mirror: pcie-mirror@10000400 {
+               compatible = "mediatek,mt7622-pcie-mirror",
+                            "syscon";
+               reg = <0 0x10000400 0 0x10>;
+       };
+
+       wed0: wed@1020a000 {
+               compatible = "mediatek,mt7622-wed",
+                            "syscon";
+               reg = <0 0x1020a000 0 0x1000>;
+               interrupts = <GIC_SPI 214 IRQ_TYPE_LEVEL_LOW>;
+       };
+
+       wed1: wed@1020b000 {
+               compatible = "mediatek,mt7622-wed",
+                            "syscon";
+               reg = <0 0x1020b000 0 0x1000>;
+               interrupts = <GIC_SPI 215 IRQ_TYPE_LEVEL_LOW>;
+       };
+
        eth: ethernet@1b100000 {
                compatible = "mediatek,mt7622-eth",
                             "mediatek,mt2701-eth",
@@ -965,6 +990,11 @@
                power-domains = <&scpsys MT7622_POWER_DOMAIN_ETHSYS>;
                mediatek,ethsys = <&ethsys>;
                mediatek,sgmiisys = <&sgmiisys>;
+               cci-control-port = <&cci_control2>;
+               mediatek,wed = <&wed0>, <&wed1>;
+               mediatek,pcie-mirror = <&pcie_mirror>;
+               mediatek,hifsys = <&hifsys>;
+               dma-coherent;
                #address-cells = <1>;
                #size-cells = <0>;
                status = "disabled";