Merge tag 'soc-dt-6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
[platform/kernel/linux-rpi.git] / arch / arm64 / boot / dts / freescale / imx8mq.dtsi
index 01eec42..35f07df 100644 (file)
                nvmem-cells = <&imx8mq_uid>;
                nvmem-cell-names = "soc_unique_id";
 
+               etm0: etm@28440000 {
+                       compatible = "arm,coresight-etm4x", "arm,primecell";
+                       reg = <0x28440000 0x1000>;
+                       cpu = <&A53_0>;
+                       clocks = <&clk IMX8MQ_CLK_MAIN_AXI>;
+                       clock-names = "apb_pclk";
+
+                       out-ports {
+                               port {
+                                       etm0_out_port: endpoint {
+                                               remote-endpoint = <&ca_funnel_in_port0>;
+                                       };
+                               };
+                       };
+               };
+
+               etm1: etm@28540000 {
+                       compatible = "arm,coresight-etm4x", "arm,primecell";
+                       reg = <0x28540000 0x1000>;
+                       cpu = <&A53_1>;
+                       clocks = <&clk IMX8MQ_CLK_MAIN_AXI>;
+                       clock-names = "apb_pclk";
+
+                       out-ports {
+                               port {
+                                       etm1_out_port: endpoint {
+                                               remote-endpoint = <&ca_funnel_in_port1>;
+                                       };
+                               };
+                       };
+               };
+
+               etm2: etm@28640000 {
+                       compatible = "arm,coresight-etm4x", "arm,primecell";
+                       reg = <0x28640000 0x1000>;
+                       cpu = <&A53_2>;
+                       clocks = <&clk IMX8MQ_CLK_MAIN_AXI>;
+                       clock-names = "apb_pclk";
+
+                       out-ports {
+                               port {
+                                       etm2_out_port: endpoint {
+                                               remote-endpoint = <&ca_funnel_in_port2>;
+                                       };
+                               };
+                       };
+               };
+
+               etm3: etm@28740000 {
+                       compatible = "arm,coresight-etm4x", "arm,primecell";
+                       reg = <0x28740000 0x1000>;
+                       cpu = <&A53_3>;
+                       clocks = <&clk IMX8MQ_CLK_MAIN_AXI>;
+                       clock-names = "apb_pclk";
+
+                       out-ports {
+                               port {
+                                       etm3_out_port: endpoint {
+                                               remote-endpoint = <&ca_funnel_in_port3>;
+                                       };
+                               };
+                       };
+               };
+
+               funnel {
+                       /*
+                        * non-configurable funnel don't show up on the AMBA
+                        * bus.  As such no need to add "arm,primecell".
+                        */
+                       compatible = "arm,coresight-static-funnel";
+
+                       in-ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               port@0 {
+                                       reg = <0>;
+
+                                       ca_funnel_in_port0: endpoint {
+                                               remote-endpoint = <&etm0_out_port>;
+                                       };
+                               };
+
+                               port@1 {
+                                       reg = <1>;
+
+                                       ca_funnel_in_port1: endpoint {
+                                               remote-endpoint = <&etm1_out_port>;
+                                       };
+                               };
+
+                               port@2 {
+                                       reg = <2>;
+
+                                       ca_funnel_in_port2: endpoint {
+                                               remote-endpoint = <&etm2_out_port>;
+                                       };
+                               };
+
+                               port@3 {
+                                       reg = <3>;
+
+                                       ca_funnel_in_port3: endpoint {
+                                               remote-endpoint = <&etm3_out_port>;
+                                       };
+                               };
+                       };
+
+                       out-ports {
+                               port {
+                                       ca_funnel_out_port0: endpoint {
+                                               remote-endpoint = <&hugo_funnel_in_port0>;
+                                       };
+                               };
+                       };
+               };
+
+               funnel@28c03000 {
+                       compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
+                       reg = <0x28c03000 0x1000>;
+                       clocks = <&clk IMX8MQ_CLK_MAIN_AXI>;
+                       clock-names = "apb_pclk";
+
+                       in-ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               port@0 {
+                                       reg = <0>;
+
+                                       hugo_funnel_in_port0: endpoint {
+                                               remote-endpoint = <&ca_funnel_out_port0>;
+                                       };
+                               };
+
+                               port@1 {
+                                       reg = <1>;
+
+                                       hugo_funnel_in_port1: endpoint {
+                                       /* M4 input */
+                                       };
+                               };
+                               /* the other input ports are not connect to anything */
+                       };
+
+                       out-ports {
+                               port {
+                                       hugo_funnel_out_port0: endpoint {
+                                               remote-endpoint = <&etf_in_port>;
+                                       };
+                               };
+                       };
+               };
+
+               etf@28c04000 {
+                       compatible = "arm,coresight-tmc", "arm,primecell";
+                       reg = <0x28c04000 0x1000>;
+                       clocks = <&clk IMX8MQ_CLK_MAIN_AXI>;
+                       clock-names = "apb_pclk";
+
+                       in-ports {
+                               port {
+                                       etf_in_port: endpoint {
+                                               remote-endpoint = <&hugo_funnel_out_port0>;
+                                       };
+                               };
+                       };
+
+                       out-ports {
+                               port {
+                                       etf_out_port: endpoint {
+                                               remote-endpoint = <&etr_in_port>;
+                                       };
+                               };
+                       };
+               };
+
+               etr@28c06000 {
+                       compatible = "arm,coresight-tmc", "arm,primecell";
+                       reg = <0x28c06000 0x1000>;
+                       clocks = <&clk IMX8MQ_CLK_MAIN_AXI>;
+                       clock-names = "apb_pclk";
+
+                       in-ports {
+                               port {
+                                       etr_in_port: endpoint {
+                                               remote-endpoint = <&etf_out_port>;
+                                       };
+                               };
+                       };
+               };
+
                aips1: bus@30000000 { /* AIPS1 */
                        compatible = "fsl,aips-bus", "simple-bus";
                        reg = <0x30000000 0x400000>;
                                compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd";
                                reg = <0x30370000 0x10000>;
 
-                               snvs_rtc: snvs-rtc-lp{
+                               snvs_rtc: snvs-rtc-lp {
                                        compatible = "fsl,sec-v4.0-mon-rtc-lp";
-                                       regmap =<&snvs>;
+                                       regmap = <&snvs>;
                                        offset = <0x34>;
                                        interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
                                                <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
                        #size-cells = <2>;
                        device_type = "pci";
                        bus-range = <0x00 0xff>;
-                       ranges =  <0x81000000 0 0x00000000 0x27f80000 0 0x00010000>, /* downstream I/O 64KB */
-                                 <0x82000000 0 0x20000000 0x20000000 0 0x07f00000>; /* non-prefetchable memory */
+                       ranges = <0x81000000 0 0x00000000 0x27f80000 0 0x00010000>, /* downstream I/O 64KB */
+                                <0x82000000 0 0x20000000 0x20000000 0 0x07f00000>; /* non-prefetchable memory */
                        num-lanes = <1>;
                        interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
                        interrupt-names = "msi";