Merge tag 'soc-dt-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
[platform/kernel/linux-rpi.git] / arch / arm64 / boot / dts / freescale / imx8mp.dtsi
index 274c088..cc406bb 100644 (file)
                                         <&clk IMX8MP_CLK_MEDIA_APB_ROOT>,
                                         <&clk IMX8MP_CLK_MEDIA_AXI_ROOT>;
                                clock-names = "pix", "axi", "disp_axi";
-                               assigned-clocks = <&clk IMX8MP_CLK_MEDIA_DISP1_PIX_ROOT>,
-                                                 <&clk IMX8MP_CLK_MEDIA_AXI>,
-                                                 <&clk IMX8MP_CLK_MEDIA_APB>;
-                               assigned-clock-parents = <&clk IMX8MP_CLK_MEDIA_DISP1_PIX>,
-                                                        <&clk IMX8MP_SYS_PLL2_1000M>,
-                                                        <&clk IMX8MP_SYS_PLL1_800M>;
-                               assigned-clock-rates = <594000000>, <500000000>, <200000000>;
                                interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
                                power-domains = <&media_blk_ctrl IMX8MP_MEDIABLK_PD_LCDIF_1>;
                                status = "disabled";
                                         <&clk IMX8MP_CLK_MEDIA_APB_ROOT>,
                                         <&clk IMX8MP_CLK_MEDIA_AXI_ROOT>;
                                clock-names = "pix", "axi", "disp_axi";
-                               assigned-clocks = <&clk IMX8MP_CLK_MEDIA_DISP2_PIX>,
-                                                 <&clk IMX8MP_VIDEO_PLL1>;
-                               assigned-clock-parents = <&clk IMX8MP_VIDEO_PLL1_OUT>,
-                                                        <&clk IMX8MP_VIDEO_PLL1_REF_SEL>;
-                               assigned-clock-rates = <0>, <1039500000>;
                                power-domains = <&media_blk_ctrl IMX8MP_MEDIABLK_PD_LCDIF_2>;
                                status = "disabled";
 
                                              "disp1", "disp2", "isp", "phy";
 
                                assigned-clocks = <&clk IMX8MP_CLK_MEDIA_AXI>,
-                                                 <&clk IMX8MP_CLK_MEDIA_APB>;
+                                                 <&clk IMX8MP_CLK_MEDIA_APB>,
+                                                 <&clk IMX8MP_CLK_MEDIA_DISP1_PIX>,
+                                                 <&clk IMX8MP_CLK_MEDIA_DISP2_PIX>,
+                                                 <&clk IMX8MP_VIDEO_PLL1>;
                                assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_1000M>,
-                                                        <&clk IMX8MP_SYS_PLL1_800M>;
-                               assigned-clock-rates = <500000000>, <200000000>;
-
+                                                        <&clk IMX8MP_SYS_PLL1_800M>,
+                                                        <&clk IMX8MP_VIDEO_PLL1_OUT>,
+                                                        <&clk IMX8MP_VIDEO_PLL1_OUT>;
+                               assigned-clock-rates = <500000000>, <200000000>,
+                                                      <0>, <0>, <1039500000>;
                                #power-domain-cells = <1>;
 
                                lvds_bridge: bridge@5c {