Merge tag 'usb-6.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb

[platform/kernel/linux-rpi.git] / arch / arm64 / boot / dts / freescale / imx8mp.dtsi

diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index 522ab47..bb916a0 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -5,8 +5,10 @@
 
 #include <dt-bindings/clock/imx8mp-clock.h>
 #include <dt-bindings/power/imx8mp-power.h>
+#include <dt-bindings/reset/imx8mp-reset.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>
+#include <dt-bindings/interconnect/fsl,imx8mp.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/thermal/thermal.h>
 
@@ -469,6 +471,11 @@
                                        wakeup-source;
                                        status = "disabled";
                                };
+
+                               snvs_lpgpr: snvs-lpgpr {
+                                       compatible = "fsl,imx8mp-snvs-lpgpr",
+                                                    "fsl,imx7d-snvs-lpgpr";
+                               };
                        };
 
                        clk: clock-controller@30380000 {
@@ -597,6 +604,33 @@
                                                reg = <IMX8MP_POWER_DOMAIN_MEDIAMIX_ISPDWP>;
                                                clocks = <&clk IMX8MP_CLK_MEDIA_ISP_ROOT>;
                                        };
+
+                                       pgc_vpumix: power-domain@19 {
+                                               #power-domain-cells = <0>;
+                                               reg = <IMX8MP_POWER_DOMAIN_VPUMIX>;
+                                               clocks =<&clk IMX8MP_CLK_VPU_ROOT>;
+                                       };
+
+                                       pgc_vpu_g1: power-domain@20 {
+                                               #power-domain-cells = <0>;
+                                               power-domains = <&pgc_vpumix>;
+                                               reg = <IMX8MP_POWER_DOMAIN_VPU_G1>;
+                                               clocks = <&clk IMX8MP_CLK_VPU_G1_ROOT>;
+                                       };
+
+                                       pgc_vpu_g2: power-domain@21 {
+                                               #power-domain-cells = <0>;
+                                               power-domains = <&pgc_vpumix>;
+                                               reg = <IMX8MP_POWER_DOMAIN_VPU_G2>;
+                                               clocks = <&clk IMX8MP_CLK_VPU_G2_ROOT>;
+                                       };
+
+                                       pgc_vpu_vc8000e: power-domain@22 {
+                                               #power-domain-cells = <0>;
+                                               power-domains = <&pgc_vpumix>;
+                                               reg = <IMX8MP_POWER_DOMAIN_VPU_VC8000E>;
+                                               clocks = <&clk IMX8MP_CLK_VPU_VC8KE_ROOT>;
+                                       };
                                };
                        };
                };
@@ -1064,6 +1098,18 @@
                                                     "lcdif1", "isi", "mipi-csi2",
                                                     "lcdif2", "isp", "dwe",
                                                     "mipi-dsi2";
+                               interconnects =
+                                       <&noc IMX8MP_ICM_LCDIF_RD &noc IMX8MP_ICN_MEDIA>,
+                                       <&noc IMX8MP_ICM_LCDIF_WR &noc IMX8MP_ICN_MEDIA>,
+                                       <&noc IMX8MP_ICM_ISI0 &noc IMX8MP_ICN_MEDIA>,
+                                       <&noc IMX8MP_ICM_ISI1 &noc IMX8MP_ICN_MEDIA>,
+                                       <&noc IMX8MP_ICM_ISI2 &noc IMX8MP_ICN_MEDIA>,
+                                       <&noc IMX8MP_ICM_ISP0 &noc IMX8MP_ICN_MEDIA>,
+                                       <&noc IMX8MP_ICM_ISP1 &noc IMX8MP_ICN_MEDIA>,
+                                       <&noc IMX8MP_ICM_DWE &noc IMX8MP_ICN_MEDIA>;
+                               interconnect-names = "lcdif-rd", "lcdif-wr", "isi0",
+                                                    "isi1", "isi2", "isp0", "isp1",
+                                                    "dwe";
                                clocks = <&clk IMX8MP_CLK_MEDIA_APB_ROOT>,
                                         <&clk IMX8MP_CLK_MEDIA_AXI_ROOT>,
                                         <&clk IMX8MP_CLK_MEDIA_CAM1_PIX_ROOT>,
@@ -1084,6 +1130,17 @@
                                #power-domain-cells = <1>;
                        };
 
+                       pcie_phy: pcie-phy@32f00000 {
+                               compatible = "fsl,imx8mp-pcie-phy";
+                               reg = <0x32f00000 0x10000>;
+                               resets = <&src IMX8MP_RESET_PCIEPHY>,
+                                        <&src IMX8MP_RESET_PCIEPHY_PERST>;
+                               reset-names = "pciephy", "perst";
+                               power-domains = <&hsio_blk_ctrl IMX8MP_HSIOBLK_PD_PCIE_PHY>;
+                               #phy-cells = <0>;
+                               status = "disabled";
+                       };
+
                        hsio_blk_ctrl: blk-ctrl@32f10000 {
                                compatible = "fsl,imx8mp-hsio-blk-ctrl", "syscon";
                                reg = <0x32f10000 0x24>;
@@ -1095,10 +1152,46 @@
                                                <&pgc_hsiomix>, <&pgc_pcie_phy>;
                                power-domain-names = "bus", "usb", "usb-phy1",
                                                     "usb-phy2", "pcie", "pcie-phy";
+                               interconnects = <&noc IMX8MP_ICM_NOC_PCIE &noc IMX8MP_ICN_HSIO>,
+                                               <&noc IMX8MP_ICM_USB1 &noc IMX8MP_ICN_HSIO>,
+                                               <&noc IMX8MP_ICM_USB2 &noc IMX8MP_ICN_HSIO>,
+                                               <&noc IMX8MP_ICM_PCIE &noc IMX8MP_ICN_HSIO>;
+                               interconnect-names = "noc-pcie", "usb1", "usb2", "pcie";
                                #power-domain-cells = <1>;
                        };
                };
 
+               pcie: pcie@33800000 {
+                       compatible = "fsl,imx8mp-pcie";
+                       reg = <0x33800000 0x400000>, <0x1ff00000 0x80000>;
+                       reg-names = "dbi", "config";
+                       #address-cells = <3>;
+                       #size-cells = <2>;
+                       device_type = "pci";
+                       bus-range = <0x00 0xff>;
+                       ranges =  <0x81000000 0 0x00000000 0x1ff80000 0 0x00010000>, /* downstream I/O 64KB */
+                                 <0x82000000 0 0x18000000 0x18000000 0 0x07f00000>; /* non-prefetchable memory */
+                       num-lanes = <1>;
+                       num-viewport = <4>;
+                       interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "msi";
+                       #interrupt-cells = <1>;
+                       interrupt-map-mask = <0 0 0 0x7>;
+                       interrupt-map = <0 0 0 1 &gic GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
+                                       <0 0 0 2 &gic GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
+                                       <0 0 0 3 &gic GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
+                                       <0 0 0 4 &gic GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
+                       fsl,max-link-speed = <3>;
+                       linux,pci-domain = <0>;
+                       power-domains = <&hsio_blk_ctrl IMX8MP_HSIOBLK_PD_PCIE>;
+                       resets = <&src IMX8MP_RESET_PCIE_CTRL_APPS_EN>,
+                                <&src IMX8MP_RESET_PCIE_CTRL_APPS_TURNOFF>;
+                       reset-names = "apps", "turnoff";
+                       phys = <&pcie_phy>;
+                       phy-names = "pcie-phy";
+                       status = "disabled";
+               };
+
                gpu3d: gpu@38000000 {
                        compatible = "vivante,gc";
                        reg = <0x38000000 0x8000>;
@@ -1130,6 +1223,23 @@
                        power-domains = <&pgc_gpu2d>;
                };
 
+               vpumix_blk_ctrl: blk-ctrl@38330000 {
+                       compatible = "fsl,imx8mp-vpu-blk-ctrl", "syscon";
+                       reg = <0x38330000 0x100>;
+                       #power-domain-cells = <1>;
+                       power-domains = <&pgc_vpumix>, <&pgc_vpu_g1>,
+                                       <&pgc_vpu_g2>, <&pgc_vpu_vc8000e>;
+                       power-domain-names = "bus", "g1", "g2", "vc8000e";
+                       clocks = <&clk IMX8MP_CLK_VPU_G1_ROOT>,
+                                <&clk IMX8MP_CLK_VPU_G2_ROOT>,
+                                <&clk IMX8MP_CLK_VPU_VC8KE_ROOT>;
+                       clock-names = "g1", "g2", "vc8000e";
+                       interconnects = <&noc IMX8MP_ICM_VPU_G1 &noc IMX8MP_ICN_VIDEO>,
+                                       <&noc IMX8MP_ICM_VPU_G2 &noc IMX8MP_ICN_VIDEO>,
+                                       <&noc IMX8MP_ICM_VPU_H1 &noc IMX8MP_ICN_VIDEO>;
+                       interconnect-names = "g1", "g2", "vc8000e";
+               };
+
                gic: interrupt-controller@38800000 {
                        compatible = "arm,gic-v3";
                        reg = <0x38800000 0x10000>,