Merge tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

[platform/kernel/linux-starfive.git] / arch / arm64 / boot / dts / freescale / fsl-ls1043a.dtsi

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
index 19572d8..e669fbd 100644 (file)
--- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
@@ -167,6 +167,49 @@
                        big-endian;
                };
 
+               crypto: crypto@1700000 {
+                       compatible = "fsl,sec-v5.4", "fsl,sec-v5.0",
+                                    "fsl,sec-v4.0";
+                       fsl,sec-era = <3>;
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       ranges = <0x0 0x00 0x1700000 0x100000>;
+                       reg = <0x00 0x1700000 0x0 0x100000>;
+                       interrupts = <0 75 0x4>;
+
+                       sec_jr0: jr@10000 {
+                               compatible = "fsl,sec-v5.4-job-ring",
+                                            "fsl,sec-v5.0-job-ring",
+                                            "fsl,sec-v4.0-job-ring";
+                               reg        = <0x10000 0x10000>;
+                               interrupts = <0 71 0x4>;
+                       };
+
+                       sec_jr1: jr@20000 {
+                               compatible = "fsl,sec-v5.4-job-ring",
+                                            "fsl,sec-v5.0-job-ring",
+                                            "fsl,sec-v4.0-job-ring";
+                               reg        = <0x20000 0x10000>;
+                               interrupts = <0 72 0x4>;
+                       };
+
+                       sec_jr2: jr@30000 {
+                               compatible = "fsl,sec-v5.4-job-ring",
+                                            "fsl,sec-v5.0-job-ring",
+                                            "fsl,sec-v4.0-job-ring";
+                               reg        = <0x30000 0x10000>;
+                               interrupts = <0 73 0x4>;
+                       };
+
+                       sec_jr3: jr@40000 {
+                               compatible = "fsl,sec-v5.4-job-ring",
+                                            "fsl,sec-v5.0-job-ring",
+                                            "fsl,sec-v4.0-job-ring";
+                               reg        = <0x40000 0x10000>;
+                               interrupts = <0 74 0x4>;
+                       };
+               };
+
                dcfg: dcfg@1ee0000 {
                        compatible = "fsl,ls1043a-dcfg", "syscon";
                        reg = <0x0 0x1ee0000 0x0 0x10000>;