Merge branch 'for-linus' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/jikos...

[platform/kernel/linux-rpi.git] / arch / arm64 / Kconfig

diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index 416dbc6..b907bf4 100644 (file)
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -22,7 +22,24 @@ config ARM64
        select ARCH_HAS_STRICT_MODULE_RWX
        select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
        select ARCH_HAVE_NMI_SAFE_CMPXCHG if ACPI_APEI_SEA
+       select ARCH_INLINE_READ_LOCK if !PREEMPT
+       select ARCH_INLINE_READ_LOCK_BH if !PREEMPT
+       select ARCH_INLINE_READ_LOCK_IRQ if !PREEMPT
+       select ARCH_INLINE_READ_LOCK_IRQSAVE if !PREEMPT
+       select ARCH_INLINE_READ_UNLOCK if !PREEMPT
+       select ARCH_INLINE_READ_UNLOCK_BH if !PREEMPT
+       select ARCH_INLINE_READ_UNLOCK_IRQ if !PREEMPT
+       select ARCH_INLINE_READ_UNLOCK_IRQRESTORE if !PREEMPT
+       select ARCH_INLINE_WRITE_LOCK if !PREEMPT
+       select ARCH_INLINE_WRITE_LOCK_BH if !PREEMPT
+       select ARCH_INLINE_WRITE_LOCK_IRQ if !PREEMPT
+       select ARCH_INLINE_WRITE_LOCK_IRQSAVE if !PREEMPT
+       select ARCH_INLINE_WRITE_UNLOCK if !PREEMPT
+       select ARCH_INLINE_WRITE_UNLOCK_BH if !PREEMPT
+       select ARCH_INLINE_WRITE_UNLOCK_IRQ if !PREEMPT
+       select ARCH_INLINE_WRITE_UNLOCK_IRQRESTORE if !PREEMPT
        select ARCH_USE_CMPXCHG_LOCKREF
+       select ARCH_USE_QUEUED_RWLOCKS
        select ARCH_SUPPORTS_MEMORY_FAILURE
        select ARCH_SUPPORTS_ATOMIC_RMW
        select ARCH_SUPPORTS_NUMA_BALANCING
@@ -539,6 +556,25 @@ config QCOM_QDF2400_ERRATUM_0065
 
          If unsure, say Y.
 
+
+config SOCIONEXT_SYNQUACER_PREITS
+       bool "Socionext Synquacer: Workaround for GICv3 pre-ITS"
+       default y
+       help
+         Socionext Synquacer SoCs implement a separate h/w block to generate
+         MSI doorbell writes with non-zero values for the device ID.
+
+         If unsure, say Y.
+
+config HISILICON_ERRATUM_161600802
+       bool "Hip07 161600802: Erroneous redistributor VLPI base"
+       default y
+       help
+         The HiSilicon Hip07 SoC usees the wrong redistributor base
+         when issued ITS commands such as VMOVP and VMAPP, and requires
+         a 128kB offset to be applied to the target address in this commands.
+
+         If unsure, say Y.
 endmenu