Merge tag 'kvmarm-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm...

[platform/kernel/linux-starfive.git] / arch / arm64 / Kconfig

diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index 343e1e1..4b269da 100644 (file)
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -207,6 +207,7 @@ config ARM64
        select HAVE_IOREMAP_PROT
        select HAVE_IRQ_TIME_ACCOUNTING
        select HAVE_KVM
+       select HAVE_MOD_ARCH_SPECIFIC
        select HAVE_NMI
        select HAVE_PERF_EVENTS
        select HAVE_PERF_REGS
@@ -406,6 +407,25 @@ menu "Kernel Features"
 
 menu "ARM errata workarounds via the alternatives framework"
 
+config AMPERE_ERRATUM_AC03_CPU_38
+        bool "AmpereOne: AC03_CPU_38: Certain bits in the Virtualization Translation Control Register and Translation Control Registers do not follow RES0 semantics"
+       default y
+       help
+         This option adds an alternative code sequence to work around Ampere
+         erratum AC03_CPU_38 on AmpereOne.
+
+         The affected design reports FEAT_HAFDBS as not implemented in
+         ID_AA64MMFR1_EL1.HAFDBS, but (V)TCR_ELx.{HA,HD} are not RES0
+         as required by the architecture. The unadvertised HAFDBS
+         implementation suffers from an additional erratum where hardware
+         A/D updates can occur after a PTE has been marked invalid.
+
+         The workaround forces KVM to explicitly set VTCR_EL2.HA to 0,
+         which avoids enabling unadvertised hardware Access Flag management
+         at stage-2.
+
+         If unsure, say Y.
+
 config ARM64_WORKAROUND_CLEAN_CACHE
        bool
 
@@ -577,7 +597,6 @@ config ARM64_ERRATUM_845719
 config ARM64_ERRATUM_843419
        bool "Cortex-A53: 843419: A load or store might access an incorrect address"
        default y
-       select ARM64_MODULE_PLTS if MODULES
        help
          This option links the kernel with '--fix-cortex-a53-843419' and
          enables PLT support to replace certain ADRP instructions, which can
@@ -2107,26 +2126,6 @@ config ARM64_SME
          register state capable of holding two dimensional matrix tiles to
          enable various matrix operations.
 
-config ARM64_MODULE_PLTS
-       bool "Use PLTs to allow module memory to spill over into vmalloc area"
-       depends on MODULES
-       select HAVE_MOD_ARCH_SPECIFIC
-       help
-         Allocate PLTs when loading modules so that jumps and calls whose
-         targets are too far away for their relative offsets to be encoded
-         in the instructions themselves can be bounced via veneers in the
-         module's PLT. This allows modules to be allocated in the generic
-         vmalloc area after the dedicated module memory area has been
-         exhausted.
-
-         When running with address space randomization (KASLR), the module
-         region itself may be too far away for ordinary relative jumps and
-         calls, and so in that case, module PLTs are required and cannot be
-         disabled.
-
-         Specific errata workaround(s) might also force module PLTs to be
-         enabled (ARM64_ERRATUM_843419).
-
 config ARM64_PSEUDO_NMI
        bool "Support for NMI-like interrupts"
        select ARM_GIC_V3
@@ -2167,7 +2166,6 @@ config RELOCATABLE
 
 config RANDOMIZE_BASE
        bool "Randomize the address of the kernel image"
-       select ARM64_MODULE_PLTS if MODULES
        select RELOCATABLE
        help
          Randomizes the virtual address at which the kernel image is
@@ -2198,9 +2196,8 @@ config RANDOMIZE_MODULE_REGION_FULL
          When this option is not set, the module region will be randomized over
          a limited range that contains the [_stext, _etext] interval of the
          core kernel, so branch relocations are almost always in range unless
-         ARM64_MODULE_PLTS is enabled and the region is exhausted. In this
-         particular case of region exhaustion, modules might be able to fall
-         back to a larger 2GB area.
+         the region is exhausted. In this particular case of region
+         exhaustion, modules might be able to fall back to a larger 2GB area.
 
 config CC_HAVE_STACKPROTECTOR_SYSREG
        def_bool $(cc-option,-mstack-protector-guard=sysreg -mstack-protector-guard-reg=sp_el0 -mstack-protector-guard-offset=0)