{
const void *fdt = gd->fdt_blob;
int soc_node, aidet_node;
- const u32 *val;
+ const fdt32_t *val;
unsigned long aidet_base;
u32 tmp;
writel(0x0000b500, 0x6184e024);
writel(0x00000001, 0x6184e000);
}
-
+#ifdef CONFIG_ARMV8_MULTIENTRY
cci500_init(2);
+#endif
}
#endif
struct uniphier_initdata {
- enum uniphier_soc_id soc_id;
+ unsigned int soc_id;
bool nand_2cs;
+ void (*sbc_init)(void);
void (*pll_init)(void);
void (*clk_init)(void);
void (*misc_init)(void);
};
-struct uniphier_initdata uniphier_initdata[] = {
+static const struct uniphier_initdata uniphier_initdata[] = {
#if defined(CONFIG_ARCH_UNIPHIER_SLD3)
{
- .soc_id = SOC_UNIPHIER_SLD3,
+ .soc_id = UNIPHIER_SLD3_ID,
.nand_2cs = true,
+ .sbc_init = uniphier_sbc_init_admulti,
.pll_init = uniphier_sld3_pll_init,
.clk_init = uniphier_ld4_clk_init,
},
#endif
#if defined(CONFIG_ARCH_UNIPHIER_LD4)
{
- .soc_id = SOC_UNIPHIER_LD4,
+ .soc_id = UNIPHIER_LD4_ID,
.nand_2cs = true,
+ .sbc_init = uniphier_ld4_sbc_init,
.pll_init = uniphier_ld4_pll_init,
.clk_init = uniphier_ld4_clk_init,
},
#endif
#if defined(CONFIG_ARCH_UNIPHIER_PRO4)
{
- .soc_id = SOC_UNIPHIER_PRO4,
+ .soc_id = UNIPHIER_PRO4_ID,
.nand_2cs = false,
+ .sbc_init = uniphier_sbc_init_savepin,
.pll_init = uniphier_pro4_pll_init,
.clk_init = uniphier_pro4_clk_init,
},
#endif
#if defined(CONFIG_ARCH_UNIPHIER_SLD8)
{
- .soc_id = SOC_UNIPHIER_SLD8,
+ .soc_id = UNIPHIER_SLD8_ID,
.nand_2cs = true,
+ .sbc_init = uniphier_ld4_sbc_init,
.pll_init = uniphier_ld4_pll_init,
.clk_init = uniphier_ld4_clk_init,
},
#endif
#if defined(CONFIG_ARCH_UNIPHIER_PRO5)
{
- .soc_id = SOC_UNIPHIER_PRO5,
+ .soc_id = UNIPHIER_PRO5_ID,
.nand_2cs = true,
+ .sbc_init = uniphier_sbc_init_savepin,
.clk_init = uniphier_pro5_clk_init,
},
#endif
#if defined(CONFIG_ARCH_UNIPHIER_PXS2)
{
- .soc_id = SOC_UNIPHIER_PXS2,
+ .soc_id = UNIPHIER_PXS2_ID,
.nand_2cs = true,
+ .sbc_init = uniphier_pxs2_sbc_init,
.clk_init = uniphier_pxs2_clk_init,
},
#endif
#if defined(CONFIG_ARCH_UNIPHIER_LD6B)
{
- .soc_id = SOC_UNIPHIER_LD6B,
+ .soc_id = UNIPHIER_LD6B_ID,
.nand_2cs = true,
+ .sbc_init = uniphier_pxs2_sbc_init,
.clk_init = uniphier_pxs2_clk_init,
},
#endif
#if defined(CONFIG_ARCH_UNIPHIER_LD11)
{
- .soc_id = SOC_UNIPHIER_LD11,
+ .soc_id = UNIPHIER_LD11_ID,
.nand_2cs = false,
+ .sbc_init = uniphier_ld11_sbc_init,
.pll_init = uniphier_ld11_pll_init,
.clk_init = uniphier_ld11_clk_init,
.misc_init = uniphier_ld11_misc_init,
#endif
#if defined(CONFIG_ARCH_UNIPHIER_LD20)
{
- .soc_id = SOC_UNIPHIER_LD20,
+ .soc_id = UNIPHIER_LD20_ID,
.nand_2cs = false,
+ .sbc_init = uniphier_ld11_sbc_init,
.pll_init = uniphier_ld20_pll_init,
+ .clk_init = uniphier_ld20_clk_init,
.misc_init = uniphier_ld20_misc_init,
},
#endif
+#if defined(CONFIG_ARCH_UNIPHIER_PXS3)
+ {
+ .soc_id = UNIPHIER_PXS3_ID,
+ .nand_2cs = false,
+ .sbc_init = uniphier_pxs2_sbc_init,
+ .pll_init = uniphier_pxs3_pll_init,
+ .clk_init = uniphier_pxs3_clk_init,
+ },
+#endif
};
-
-static struct uniphier_initdata *uniphier_get_initdata(
- enum uniphier_soc_id soc_id)
-{
- int i;
-
- for (i = 0; i < ARRAY_SIZE(uniphier_initdata); i++) {
- if (uniphier_initdata[i].soc_id == soc_id)
- return &uniphier_initdata[i];
- }
-
- return NULL;
-}
+UNIPHIER_DEFINE_SOCDATA_FUNC(uniphier_get_initdata, uniphier_initdata)
int board_init(void)
{
- struct uniphier_initdata *initdata;
- enum uniphier_soc_id soc_id;
+ const struct uniphier_initdata *initdata;
int ret;
led_puts("U0");
- soc_id = uniphier_get_soc_type();
- initdata = uniphier_get_initdata(soc_id);
+ initdata = uniphier_get_initdata();
if (!initdata) {
- pr_err("unsupported board\n");
+ pr_err("unsupported SoC\n");
return -EINVAL;
}
+ initdata->sbc_init();
+
+ support_card_init();
+
+ led_puts("U0");
+
if (IS_ENABLED(CONFIG_NAND_DENALI)) {
ret = uniphier_pin_init(initdata->nand_2cs ?
"nand2cs_grp" : "nand_grp");
led_puts("U6");
-#ifdef CONFIG_ARM64
+#ifdef CONFIG_ARMV8_MULTIENTRY
uniphier_smp_kick_all_cpus();
#endif