bool "sun4i (Allwinner A10)"
select CPU_V7A
select ARM_CORTEX_CPU_IS_UP
- select DM_MMC if MMC
- select DM_SCSI if SCSI
select PHY_SUN4I_USB
select DRAM_SUN4I
select SUNXI_GEN_SUN4I
bool "sun5i (Allwinner A13)"
select CPU_V7A
select ARM_CORTEX_CPU_IS_UP
- select DM_MMC if MMC
select DRAM_SUN4I
select PHY_SUN4I_USB
select SUNXI_GEN_SUN4I
select CPU_V7_HAS_NONSEC
select CPU_V7_HAS_VIRT
select ARCH_SUPPORT_PSCI
- select DM_MMC if MMC
select DRAM_SUN6I
select PHY_SUN4I_USB
select SUN6I_P2WI
select CPU_V7_HAS_NONSEC
select CPU_V7_HAS_VIRT
select ARCH_SUPPORT_PSCI
- select DM_MMC if MMC
select DRAM_SUN8I_A23
select PHY_SUN4I_USB
select SUNXI_GEN_SUN6I
select CPU_V7_HAS_NONSEC
select CPU_V7_HAS_VIRT
select ARCH_SUPPORT_PSCI
- select DM_MMC if MMC
select DRAM_SUN8I_A33
select PHY_SUN4I_USB
select SUNXI_GEN_SUN6I
config MACH_SUN8I_A83T
bool "sun8i (Allwinner A83T)"
select CPU_V7A
- select DM_MMC if MMC
select DRAM_SUN8I_A83T
select PHY_SUN4I_USB
select SUNXI_GEN_SUN6I
select ARCH_SUPPORT_PSCI
select MACH_SUNXI_H3_H5
select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
- select DM_MMC if MMC
config MACH_SUN8I_R40
bool "sun8i (Allwinner R40)"
select SUPPORT_SPL
select SUNXI_DRAM_DW
select SUNXI_DRAM_DW_32BIT
+ select PHY_SUN4I_USB
config MACH_SUN8I_V3S
- bool "sun8i (Allwinner V3s)"
+ bool "sun8i (Allwinner V3/V3s/S3/S3L)"
select CPU_V7A
select CPU_V7_HAS_NONSEC
select CPU_V7_HAS_VIRT
select ARCH_SUPPORT_PSCI
- select DM_MMC if MMC
select SUNXI_GEN_SUN6I
select SUNXI_DRAM_DW
select SUNXI_DRAM_DW_16BIT
select SUNXI_GEN_SUN6I
select SUN8I_RSB
select SUPPORT_SPL
- select DM_MMC if MMC
config MACH_SUN50I
bool "sun50i (Allwinner A64)"
select ARM64
+ select SPI
select DM_I2C
- select DM_MMC if MMC
+ select DM_SPI if SPI
+ select DM_SPI_FLASH
select PHY_SUN4I_USB
select SUN6I_PRCM
select SUNXI_DE2
bool "sun50i (Allwinner H5)"
select ARM64
select MACH_SUNXI_H3_H5
- select DM_MMC if MMC
select FIT
select SPL_LOAD_FIT
bool "sun50i (Allwinner H6)"
select ARM64
select SUPPORT_SPL
- select DM_MMC if MMC
select FIT
+ select PHY_SUN4I_USB
select SPL_LOAD_FIT
select DRAM_SUN50I_H6
This allows both the SPL and the U-Boot proper to be entered in
either mode and switch to AArch64 if needed.
-if SUNXI_DRAM_DW
+if SUNXI_DRAM_DW || DRAM_SUN50I_H6
config SUNXI_DRAM_DDR3
bool
config SUNXI_DRAM_DDR3_1333
bool "DDR3 1333"
select SUNXI_DRAM_DDR3
- depends on !MACH_SUN8I_V3S
---help---
This option is the original only supported memory type, which suits
many H3/H5/A64 boards available now.
This option is the LPDDR3 timing used by the stock boot0 by
Allwinner.
+config SUNXI_DRAM_H6_LPDDR3
+ bool "LPDDR3 DRAM chips on the H6 DRAM controller"
+ select SUNXI_DRAM_LPDDR3
+ depends on DRAM_SUN50I_H6
+ ---help---
+ This option is the LPDDR3 timing used by the stock boot0 by
+ Allwinner.
+
+config SUNXI_DRAM_H6_DDR3_1333
+ bool "DDR3-1333 boot0 timings on the H6 DRAM controller"
+ select SUNXI_DRAM_DDR3
+ depends on DRAM_SUN50I_H6
+ ---help---
+ This option is the DDR3 timing used by the boot0 on H6 TV boxes
+ which use a DDR3-1333 timing.
+
config SUNXI_DRAM_DDR2_V3S
bool "DDR2 found in V3s chip"
select SUNXI_DRAM_DDR2
config DRAM_ODT_EN
bool "sunxi dram odt enable"
default y if MACH_SUN8I_A23
+ default y if MACH_SUNXI_H3_H5
default y if MACH_SUN8I_R40
default y if MACH_SUN50I
default y if MACH_SUN50I_H6
config SPL_SPI_SUNXI
bool "Support for SPI Flash on Allwinner SoCs in SPL"
- depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUNXI_H3_H5 || MACH_SUN50I
+ depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUNXI_H3_H5 || MACH_SUN50I || MACH_SUN8I_R40 || MACH_SUN50I_H6
help
Enable support for SPI Flash. This option allows SPL to read from
sunxi SPI Flash. It uses the same method as the boot ROM, so does
option, the device tree selection code specific to Pine64 which
utilizes the DRAM size will be enabled.
+config PINEPHONE_DT_SELECTION
+ bool "Enable PinePhone device tree selection code"
+ depends on MACH_SUN50I
+ help
+ Enable this option to automatically select the device tree for the
+ correct PinePhone hardware revision during boot.
+
endif