Select this dram controller driver for Sun9i platforms,
like A80.
+config DRAM_SUN50I_H6
+ bool
+ help
+ Select this dram controller driver for some sun50i platforms,
+ like H6.
+
config SUN6I_P2WI
bool "Allwinner sun6i internal P2WI controller"
help
with various RSB based devices, such as AXP223, AXP8XX PMICs,
and AC100/AC200 ICs.
-config SUNXI_HIGH_SRAM
- bool
- default n
+config SUNXI_SRAM_ADDRESS
+ hex
+ default 0x10000 if MACH_SUN9I || MACH_SUN50I || MACH_SUN50I_H5
+ default 0x20000 if MACH_SUN50I_H6
+ default 0x0
---help---
Older Allwinner SoCs have their mask boot ROM mapped just below 4GB,
with the first SRAM region being located at address 0.
Some newer SoCs map the boot ROM at address 0 instead and move the
- SRAM to 64KB, just behind the mask ROM.
- Chips using the latter setup are supposed to select this option to
- adjust the addresses accordingly.
+ SRAM to a different address.
+
+config SUNXI_A64_TIMER_ERRATUM
+ bool
# Note only one of these may be selected at a time! But hidden choices are
# not supported by Kconfig
select SUNXI_GEN_SUN6I
select SUPPORT_SPL
+# TODO: try out A80's 8GiB DRAM space
+config SUNXI_DRAM_MAX_SIZE
+ hex
+ default 0xC0000000 if MACH_SUN50I || MACH_SUN50I_H5 || MACH_SUN50I_H6
+ default 0x80000000
+
choice
prompt "Sunxi SoC Variant"
optional
select PHY_SUN4I_USB
select SUNXI_GEN_SUN6I
select MMC_SUNXI_HAS_NEW_MODE
+ select MMC_SUNXI_HAS_MODE_SWITCH
select SUPPORT_SPL
config MACH_SUN8I_H3
select SUPPORT_SPL
select SUNXI_DRAM_DW
select SUNXI_DRAM_DW_32BIT
+ select PHY_SUN4I_USB
config MACH_SUN8I_V3S
- bool "sun8i (Allwinner V3s)"
+ bool "sun8i (Allwinner V3/V3s/S3/S3L)"
select CPU_V7A
select CPU_V7_HAS_NONSEC
select CPU_V7_HAS_VIRT
select CPU_V7A
select DRAM_SUN9I
select SUN6I_PRCM
- select SUNXI_HIGH_SRAM
select SUNXI_GEN_SUN6I
select SUN8I_RSB
select SUPPORT_SPL
config MACH_SUN50I
bool "sun50i (Allwinner A64)"
select ARM64
+ select SPI
select DM_I2C
+ select DM_SPI if SPI
+ select DM_SPI_FLASH
select PHY_SUN4I_USB
+ select SUN6I_PRCM
select SUNXI_DE2
select SUNXI_GEN_SUN6I
- select SUNXI_HIGH_SRAM
+ select MMC_SUNXI_HAS_NEW_MODE
select SUPPORT_SPL
select SUNXI_DRAM_DW
select SUNXI_DRAM_DW_32BIT
select FIT
select SPL_LOAD_FIT
+ select SUNXI_A64_TIMER_ERRATUM
config MACH_SUN50I_H5
bool "sun50i (Allwinner H5)"
select ARM64
select MACH_SUNXI_H3_H5
- select SUNXI_HIGH_SRAM
select FIT
select SPL_LOAD_FIT
+config MACH_SUN50I_H6
+ bool "sun50i (Allwinner H6)"
+ select ARM64
+ select SUPPORT_SPL
+ select FIT
+ select PHY_SUN4I_USB
+ select SPL_LOAD_FIT
+ select DRAM_SUN50I_H6
+
endchoice
# The sun8i SoCs share a lot, this helps to avoid a lot of "if A23 || A33"
This allows both the SPL and the U-Boot proper to be entered in
either mode and switch to AArch64 if needed.
-if SUNXI_DRAM_DW
+if SUNXI_DRAM_DW || DRAM_SUN50I_H6
config SUNXI_DRAM_DDR3
bool
config SUNXI_DRAM_DDR3_1333
bool "DDR3 1333"
select SUNXI_DRAM_DDR3
- depends on !MACH_SUN8I_V3S
---help---
This option is the original only supported memory type, which suits
many H3/H5/A64 boards available now.
This option is the LPDDR3 timing used by the stock boot0 by
Allwinner.
+config SUNXI_DRAM_H6_LPDDR3
+ bool "LPDDR3 DRAM chips on the H6 DRAM controller"
+ select SUNXI_DRAM_LPDDR3
+ depends on DRAM_SUN50I_H6
+ ---help---
+ This option is the LPDDR3 timing used by the stock boot0 by
+ Allwinner.
+
+config SUNXI_DRAM_H6_DDR3_1333
+ bool "DDR3-1333 boot0 timings on the H6 DRAM controller"
+ select SUNXI_DRAM_DDR3
+ depends on DRAM_SUN50I_H6
+ ---help---
+ This option is the DDR3 timing used by the boot0 on H6 TV boxes
+ which use a DDR3-1333 timing.
+
config SUNXI_DRAM_DDR2_V3S
bool "DDR2 found in V3s chip"
select SUNXI_DRAM_DDR2
default 360 if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || \
MACH_SUN8I_V3S
default 672 if MACH_SUN50I
+ default 744 if MACH_SUN50I_H6
---help---
Set the dram clock speed, valid range 240 - 480 (prior to sun9i),
must be a multiple of 24. For the sun9i (A80), the tested values
config DRAM_ZQ
int "sunxi dram zq value"
- default 123 if MACH_SUN4I || MACH_SUN5I || MACH_SUN6I || MACH_SUN8I
+ default 123 if MACH_SUN4I || MACH_SUN5I || MACH_SUN6I || \
+ MACH_SUN8I_A23 || MACH_SUN8I_A33 || MACH_SUN8I_A83T
default 127 if MACH_SUN7I
default 14779 if MACH_SUN8I_V3S
- default 3881979 if MACH_SUN8I_R40
+ default 3881979 if MACH_SUNXI_H3_H5 || MACH_SUN8I_R40 || MACH_SUN50I_H6
default 4145117 if MACH_SUN9I
default 3881915 if MACH_SUN50I
---help---
config DRAM_ODT_EN
bool "sunxi dram odt enable"
- default n if !MACH_SUN8I_A23
default y if MACH_SUN8I_A23
+ default y if MACH_SUNXI_H3_H5
default y if MACH_SUN8I_R40
default y if MACH_SUN50I
+ default y if MACH_SUN50I_H6
---help---
Select this to enable dram odt (on die termination).
default 816000000 if MACH_SUN50I || MACH_SUN50I_H5
default 1008000000 if MACH_SUN8I
default 1008000000 if MACH_SUN9I
+ default 888000000 if MACH_SUN50I_H6
config SYS_CONFIG_NAME
default "sun4i" if MACH_SUN4I
default "sun8i" if MACH_SUN8I
default "sun9i" if MACH_SUN9I
default "sun50i" if MACH_SUN50I
+ default "sun50i" if MACH_SUN50I_H6
config SYS_BOARD
default "sunxi"
depends on !MACH_SUN8I_V3S
depends on !MACH_SUN9I
depends on !MACH_SUN50I
+ depends on !MACH_SUN50I_H6
select VIDEO
imply VIDEO_DT_SIMPLEFB
default y
default 0x4fe00000 if MACH_SUN8I
default 0x2fe00000 if MACH_SUN9I
default 0x4fe00000 if MACH_SUN50I
+ default 0x4fe00000 if MACH_SUN50I_H6
config SPL_SPI_SUNXI
bool "Support for SPI Flash on Allwinner SoCs in SPL"
- depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUNXI_H3_H5 || MACH_SUN50I
+ depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUNXI_H3_H5 || MACH_SUN50I || MACH_SUN8I_R40 || MACH_SUN50I_H6
help
Enable support for SPI Flash. This option allows SPL to read from
sunxi SPI Flash. It uses the same method as the boot ROM, so does
not need any extra configuration.
+config PINE64_DT_SELECTION
+ bool "Enable Pine64 device tree selection code"
+ depends on MACH_SUN50I
+ help
+ The original Pine A64 and Pine A64+ are similar but different
+ boards and can be differed by the DRAM size. Pine A64 has
+ 512MiB DRAM, and Pine A64+ has 1GiB or 2GiB. By selecting this
+ option, the device tree selection code specific to Pine64 which
+ utilizes the DRAM size will be enabled.
+
+config PINEPHONE_DT_SELECTION
+ bool "Enable PinePhone device tree selection code"
+ depends on MACH_SUN50I
+ help
+ Enable this option to automatically select the device tree for the
+ correct PinePhone hardware revision during boot.
+
endif
projects / platform / kernel / u-boot.git / blobdiff