Merge tag 'u-boot-atmel-fixes-2021.01-b' of https://gitlab.denx.de/u-boot/custodians...

[platform/kernel/u-boot.git] / arch / arm / mach-sunxi / Kconfig

diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
index 560dc9b..49ef217 100644 (file)
--- a/arch/arm/mach-sunxi/Kconfig
+++ b/arch/arm/mach-sunxi/Kconfig
@@ -154,8 +154,6 @@ config MACH_SUN4I
        bool "sun4i (Allwinner A10)"
        select CPU_V7A
        select ARM_CORTEX_CPU_IS_UP
-       select DM_MMC if MMC
-       select DM_SCSI if SCSI
        select PHY_SUN4I_USB
        select DRAM_SUN4I
        select SUNXI_GEN_SUN4I
@@ -230,6 +228,7 @@ config MACH_SUN8I_A83T
        select PHY_SUN4I_USB
        select SUNXI_GEN_SUN6I
        select MMC_SUNXI_HAS_NEW_MODE
+       select MMC_SUNXI_HAS_MODE_SWITCH
        select SUPPORT_SPL
 
 config MACH_SUN8I_H3
@@ -251,9 +250,10 @@ config MACH_SUN8I_R40
        select SUPPORT_SPL
        select SUNXI_DRAM_DW
        select SUNXI_DRAM_DW_32BIT
+       select PHY_SUN4I_USB
 
 config MACH_SUN8I_V3S
-       bool "sun8i (Allwinner V3s)"
+       bool "sun8i (Allwinner V3/V3s/S3/S3L)"
        select CPU_V7A
        select CPU_V7_HAS_NONSEC
        select CPU_V7_HAS_VIRT
@@ -276,11 +276,15 @@ config MACH_SUN9I
 config MACH_SUN50I
        bool "sun50i (Allwinner A64)"
        select ARM64
+       select SPI
        select DM_I2C
+       select DM_SPI if SPI
+       select DM_SPI_FLASH
        select PHY_SUN4I_USB
        select SUN6I_PRCM
        select SUNXI_DE2
        select SUNXI_GEN_SUN6I
+       select MMC_SUNXI_HAS_NEW_MODE
        select SUPPORT_SPL
        select SUNXI_DRAM_DW
        select SUNXI_DRAM_DW_32BIT
@@ -300,6 +304,7 @@ config MACH_SUN50I_H6
        select ARM64
        select SUPPORT_SPL
        select FIT
+       select PHY_SUN4I_USB
        select SPL_LOAD_FIT
        select DRAM_SUN50I_H6
 
@@ -340,7 +345,7 @@ config ARM_BOOT_HOOK_RMR
        This allows both the SPL and the U-Boot proper to be entered in
        either mode and switch to AArch64 if needed.
 
-if SUNXI_DRAM_DW
+if SUNXI_DRAM_DW || DRAM_SUN50I_H6
 config SUNXI_DRAM_DDR3
        bool
 
@@ -358,7 +363,6 @@ choice
 config SUNXI_DRAM_DDR3_1333
        bool "DDR3 1333"
        select SUNXI_DRAM_DDR3
-       depends on !MACH_SUN8I_V3S
        ---help---
        This option is the original only supported memory type, which suits
        many H3/H5/A64 boards available now.
@@ -370,6 +374,22 @@ config SUNXI_DRAM_LPDDR3_STOCK
        This option is the LPDDR3 timing used by the stock boot0 by
        Allwinner.
 
+config SUNXI_DRAM_H6_LPDDR3
+       bool "LPDDR3 DRAM chips on the H6 DRAM controller"
+       select SUNXI_DRAM_LPDDR3
+       depends on DRAM_SUN50I_H6
+       ---help---
+       This option is the LPDDR3 timing used by the stock boot0 by
+       Allwinner.
+
+config SUNXI_DRAM_H6_DDR3_1333
+       bool "DDR3-1333 boot0 timings on the H6 DRAM controller"
+       select SUNXI_DRAM_DDR3
+       depends on DRAM_SUN50I_H6
+       ---help---
+       This option is the DDR3 timing used by the boot0 on H6 TV boxes
+       which use a DDR3-1333 timing.
+
 config SUNXI_DRAM_DDR2_V3S
        bool "DDR2 found in V3s chip"
        select SUNXI_DRAM_DDR2
@@ -413,10 +433,11 @@ endif
 
 config DRAM_ZQ
        int "sunxi dram zq value"
-       default 123 if MACH_SUN4I || MACH_SUN5I || MACH_SUN6I || MACH_SUN8I
+       default 123 if MACH_SUN4I || MACH_SUN5I || MACH_SUN6I || \
+                      MACH_SUN8I_A23 || MACH_SUN8I_A33 || MACH_SUN8I_A83T
        default 127 if MACH_SUN7I
        default 14779 if MACH_SUN8I_V3S
-       default 3881979 if MACH_SUN8I_R40 || MACH_SUN50I_H6
+       default 3881979 if MACH_SUNXI_H3_H5 || MACH_SUN8I_R40 || MACH_SUN50I_H6
        default 4145117 if MACH_SUN9I
        default 3881915 if MACH_SUN50I
        ---help---
@@ -425,6 +446,7 @@ config DRAM_ZQ
 config DRAM_ODT_EN
        bool "sunxi dram odt enable"
        default y if MACH_SUN8I_A23
+       default y if MACH_SUNXI_H3_H5
        default y if MACH_SUN8I_R40
        default y if MACH_SUN50I
        default y if MACH_SUN50I_H6
@@ -971,7 +993,7 @@ config SPL_STACK_R_ADDR
 
 config SPL_SPI_SUNXI
        bool "Support for SPI Flash on Allwinner SoCs in SPL"
-       depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUNXI_H3_H5 || MACH_SUN50I
+       depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUNXI_H3_H5 || MACH_SUN50I || MACH_SUN8I_R40 || MACH_SUN50I_H6
        help
          Enable support for SPI Flash. This option allows SPL to read from
          sunxi SPI Flash. It uses the same method as the boot ROM, so does
@@ -987,4 +1009,11 @@ config PINE64_DT_SELECTION
          option, the device tree selection code specific to Pine64 which
          utilizes the DRAM size will be enabled.
 
+config PINEPHONE_DT_SELECTION
+       bool "Enable PinePhone device tree selection code"
+       depends on MACH_SUN50I
+       help
+         Enable this option to automatically select the device tree for the
+         correct PinePhone hardware revision during boot.
+
 endif