return MMCSD_MODE_RAW;
}
+#ifdef CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
int spl_mmc_boot_partition(const u32 boot_device)
{
switch (boot_device) {
return -EINVAL;
}
}
+#endif
#ifdef CONFIG_SPL_DISPLAY_PRINT
void spl_display_print(void)
* to avoid speculative access and issue in get_ram_size()
*/
if (!CONFIG_IS_ENABLED(SYS_DCACHE_OFF))
- mmu_set_region_dcache_behaviour(STM32_DDR_BASE, STM32_DDR_SIZE,
+ mmu_set_region_dcache_behaviour(STM32_DDR_BASE,
+ CONFIG_DDR_CACHEABLE_SIZE,
DCACHE_DEFAULT_OPTION);
}
dcache_disable();
}
-void spl_board_prepare_for_boot_linux(void)
+void spl_board_prepare_for_linux(void)
{
dcache_disable();
}