Merge branch 'master' of git://git.denx.de/u-boot-sunxi

[platform/kernel/u-boot.git] / arch / arm / mach-socfpga / misc.c

diff --git a/arch/arm/mach-socfpga/misc.c b/arch/arm/mach-socfpga/misc.c
index a4f6d5c..e1adea1 100644 (file)
--- a/arch/arm/mach-socfpga/misc.c
+++ b/arch/arm/mach-socfpga/misc.c
@@ -88,33 +88,11 @@ int overwrite_console(void)
 #endif
 
 #ifdef CONFIG_FPGA
-/*
- * FPGA programming support for SoC FPGA Cyclone V
- */
-static Altera_desc altera_fpga[] = {
-       {
-               /* Family */
-               Altera_SoCFPGA,
-               /* Interface type */
-               fast_passive_parallel,
-               /* No limitation as additional data will be ignored */
-               -1,
-               /* No device function table */
-               NULL,
-               /* Base interface address specified in driver */
-               NULL,
-               /* No cookie implementation */
-               0
-       },
-};
-
 /* add device descriptor to FPGA device table */
-void socfpga_fpga_add(void)
+void socfpga_fpga_add(void *fpga_desc)
 {
-       int i;
        fpga_init();
-       for (i = 0; i < ARRAY_SIZE(altera_fpga); i++)
-               fpga_add(fpga_altera, &altera_fpga[i]);
+       fpga_add(fpga_altera, fpga_desc);
 }
 #endif
 
@@ -142,71 +120,6 @@ int arch_cpu_init(void)
        return 0;
 }
 
-#ifdef CONFIG_ETH_DESIGNWARE
-static int dwmac_phymode_to_modereg(const char *phymode, u32 *modereg)
-{
-       if (!phymode)
-               return -EINVAL;
-
-       if (!strcmp(phymode, "mii") || !strcmp(phymode, "gmii")) {
-               *modereg = SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_GMII_MII;
-               return 0;
-       }
-
-       if (!strcmp(phymode, "rgmii")) {
-               *modereg = SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_RGMII;
-               return 0;
-       }
-
-       if (!strcmp(phymode, "rmii")) {
-               *modereg = SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_RMII;
-               return 0;
-       }
-
-       return -EINVAL;
-}
-
-int socfpga_eth_reset_common(void (*resetfn)(const u8 of_reset_id,
-                                            const u8 phymode))
-{
-       const void *fdt = gd->fdt_blob;
-       struct fdtdec_phandle_args args;
-       const char *phy_mode;
-       u32 phy_modereg;
-       int nodes[2];   /* Max. two GMACs */
-       int ret, count;
-       int i, node;
-
-       count = fdtdec_find_aliases_for_id(fdt, "ethernet",
-                                          COMPAT_ALTERA_SOCFPGA_DWMAC,
-                                          nodes, ARRAY_SIZE(nodes));
-       for (i = 0; i < count; i++) {
-               node = nodes[i];
-               if (node <= 0)
-                       continue;
-
-               ret = fdtdec_parse_phandle_with_args(fdt, node, "resets",
-                                                    "#reset-cells", 1, 0,
-                                                    &args);
-               if (ret || (args.args_count != 1)) {
-                       debug("GMAC%i: Failed to parse DT 'resets'!\n", i);
-                       continue;
-               }
-
-               phy_mode = fdt_getprop(fdt, node, "phy-mode", NULL);
-               ret = dwmac_phymode_to_modereg(phy_mode, &phy_modereg);
-               if (ret) {
-                       debug("GMAC%i: Failed to parse DT 'phy-mode'!\n", i);
-                       continue;
-               }
-
-               resetfn(args.args[0], phy_modereg);
-       }
-
-       return 0;
-}
-#endif
-
 #ifndef CONFIG_SPL_BUILD
 static int do_bridge(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {