Merge tag 'nfs-for-3.14-2' of git://git.linux-nfs.org/projects/trondmy/linux-nfs

[platform/adaptation/renesas_rcar/renesas_kernel.git] / arch / arm / mach-shmobile / setup-rcar-gen2.c

diff --git a/arch/arm/mach-shmobile/setup-rcar-gen2.c b/arch/arm/mach-shmobile/setup-rcar-gen2.c
index 5734c24..69ccc6c 100644 (file)
--- a/arch/arm/mach-shmobile/setup-rcar-gen2.c
+++ b/arch/arm/mach-shmobile/setup-rcar-gen2.c
@@ -18,6 +18,7 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
  */
 
+#include <linux/clk/shmobile.h>
 #include <linux/clocksource.h>
 #include <linux/io.h>
 #include <linux/kernel.h>
@@ -44,8 +45,10 @@ u32 __init rcar_gen2_read_mode_pins(void)
 
 void __init rcar_gen2_timer_init(void)
 {
-#ifdef CONFIG_ARM_ARCH_TIMER
+#if defined(CONFIG_ARM_ARCH_TIMER) || defined(CONFIG_COMMON_CLK)
        u32 mode = rcar_gen2_read_mode_pins();
+#endif
+#ifdef CONFIG_ARM_ARCH_TIMER
        void __iomem *base;
        int extal_mhz = 0;
        u32 freq;
@@ -78,14 +81,28 @@ void __init rcar_gen2_timer_init(void)
        /* Remap "armgcnt address map" space */
        base = ioremap(0xe6080000, PAGE_SIZE);
 
-       /* Update registers with correct frequency */
-       iowrite32(freq, base + CNTFID0);
-       asm volatile("mcr p15, 0, %0, c14, c0, 0" : : "r" (freq));
+       /*
+        * Update the timer if it is either not running, or is not at the
+        * right frequency. The timer is only configurable in secure mode
+        * so this avoids an abort if the loader started the timer and
+        * entered the kernel in non-secure mode.
+        */
+
+       if ((ioread32(base + CNTCR) & 1) == 0 ||
+           ioread32(base + CNTFID0) != freq) {
+               /* Update registers with correct frequency */
+               iowrite32(freq, base + CNTFID0);
+               asm volatile("mcr p15, 0, %0, c14, c0, 0" : : "r" (freq));
+
+               /* make sure arch timer is started by setting bit 0 of CNTCR */
+               iowrite32(1, base + CNTCR);
+       }
 
-       /* make sure arch timer is started by setting bit 0 of CNTCR */
-       iowrite32(1, base + CNTCR);
        iounmap(base);
 #endif /* CONFIG_ARM_ARCH_TIMER */
 
+#ifdef CONFIG_COMMON_CLK
+       rcar_gen2_clocks_init(mode);
+#endif
        clocksource_of_init();
 }