#include <linux/sh_dma.h>
#include <linux/sh_timer.h>
#include <linux/platform_data/sh_ipmmu.h>
-#include <mach/dma-register.h>
-#include <mach/r8a7740.h>
-#include <mach/pm-rmobile.h>
-#include <mach/common.h>
-#include <mach/irqs.h>
+
#include <asm/mach-types.h>
#include <asm/mach/map.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
+#include <asm/hardware/cache-l2x0.h>
+
+#include "common.h"
+#include "dma-register.h"
+#include "irqs.h"
+#include "pm-rmobile.h"
+#include "r8a7740.h"
static struct map_desc r8a7740_io_desc[] __initdata = {
/*
R8A7740_SCIF(PORT_SCIFB, 8, 0xe6c30000, gic_spi(108));
/* CMT */
-static struct sh_timer_config cmt10_platform_data = {
- .name = "CMT10",
- .channel_offset = 0x10,
- .timer_bit = 0,
- .clockevent_rating = 125,
- .clocksource_rating = 125,
+static struct sh_timer_config cmt1_platform_data = {
+ .channels_mask = 0x3f,
};
-static struct resource cmt10_resources[] = {
- [0] = {
- .name = "CMT10",
- .start = 0xe6138010,
- .end = 0xe613801b,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = gic_spi(58),
- .flags = IORESOURCE_IRQ,
- },
+static struct resource cmt1_resources[] = {
+ DEFINE_RES_MEM(0xe6138000, 0x170),
+ DEFINE_RES_IRQ(gic_spi(58)),
};
-static struct platform_device cmt10_device = {
- .name = "sh_cmt",
- .id = 10,
+static struct platform_device cmt1_device = {
+ .name = "sh-cmt-48",
+ .id = 1,
.dev = {
- .platform_data = &cmt10_platform_data,
+ .platform_data = &cmt1_platform_data,
},
- .resource = cmt10_resources,
- .num_resources = ARRAY_SIZE(cmt10_resources),
+ .resource = cmt1_resources,
+ .num_resources = ARRAY_SIZE(cmt1_resources),
};
/* TMU */
-static struct sh_timer_config tmu00_platform_data = {
- .name = "TMU00",
- .channel_offset = 0x4,
- .timer_bit = 0,
- .clockevent_rating = 200,
+static struct sh_timer_config tmu0_platform_data = {
+ .channels_mask = 7,
};
-static struct resource tmu00_resources[] = {
- [0] = {
- .name = "TMU00",
- .start = 0xfff80008,
- .end = 0xfff80014 - 1,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = gic_spi(198),
- .flags = IORESOURCE_IRQ,
- },
+static struct resource tmu0_resources[] = {
+ DEFINE_RES_MEM(0xfff80000, 0x2c),
+ DEFINE_RES_IRQ(gic_spi(198)),
+ DEFINE_RES_IRQ(gic_spi(199)),
+ DEFINE_RES_IRQ(gic_spi(200)),
};
-static struct platform_device tmu00_device = {
- .name = "sh_tmu",
+static struct platform_device tmu0_device = {
+ .name = "sh-tmu",
.id = 0,
.dev = {
- .platform_data = &tmu00_platform_data,
- },
- .resource = tmu00_resources,
- .num_resources = ARRAY_SIZE(tmu00_resources),
-};
-
-static struct sh_timer_config tmu01_platform_data = {
- .name = "TMU01",
- .channel_offset = 0x10,
- .timer_bit = 1,
- .clocksource_rating = 200,
-};
-
-static struct resource tmu01_resources[] = {
- [0] = {
- .name = "TMU01",
- .start = 0xfff80014,
- .end = 0xfff80020 - 1,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = gic_spi(199),
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct platform_device tmu01_device = {
- .name = "sh_tmu",
- .id = 1,
- .dev = {
- .platform_data = &tmu01_platform_data,
- },
- .resource = tmu01_resources,
- .num_resources = ARRAY_SIZE(tmu01_resources),
-};
-
-static struct sh_timer_config tmu02_platform_data = {
- .name = "TMU02",
- .channel_offset = 0x1C,
- .timer_bit = 2,
- .clocksource_rating = 200,
-};
-
-static struct resource tmu02_resources[] = {
- [0] = {
- .name = "TMU02",
- .start = 0xfff80020,
- .end = 0xfff8002C - 1,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = gic_spi(200),
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct platform_device tmu02_device = {
- .name = "sh_tmu",
- .id = 2,
- .dev = {
- .platform_data = &tmu02_platform_data,
+ .platform_data = &tmu0_platform_data,
},
- .resource = tmu02_resources,
- .num_resources = ARRAY_SIZE(tmu02_resources),
+ .resource = tmu0_resources,
+ .num_resources = ARRAY_SIZE(tmu0_resources),
};
/* IPMMUI (an IPMMU module for ICB/LMB) */
.num_resources = ARRAY_SIZE(ipmmu_resources),
};
-static struct platform_device *r8a7740_devices_dt[] __initdata = {
+static struct platform_device *r8a7740_early_devices[] __initdata = {
&scif0_device,
&scif1_device,
&scif2_device,
&scif6_device,
&scif7_device,
&scif8_device,
- &cmt10_device,
-};
-
-static struct platform_device *r8a7740_early_devices[] __initdata = {
&irqpin0_device,
&irqpin1_device,
&irqpin2_device,
&irqpin3_device,
- &tmu00_device,
- &tmu01_device,
- &tmu02_device,
+ &tmu0_device,
&ipmmu_device,
+ &cmt1_device,
};
/* DMA */
* "Media RAM (MERAM)" on r8a7740 documentation
*/
#define MEBUFCNTR 0xFE950098
-void r8a7740_meram_workaround(void)
+void __init r8a7740_meram_workaround(void)
{
void __iomem *reg;
void __init r8a7740_add_standard_devices(void)
{
+ static struct pm_domain_device domain_devices[] __initdata = {
+ { "A3SP", &scif0_device },
+ { "A3SP", &scif1_device },
+ { "A3SP", &scif2_device },
+ { "A3SP", &scif3_device },
+ { "A3SP", &scif4_device },
+ { "A3SP", &scif5_device },
+ { "A3SP", &scif6_device },
+ { "A3SP", &scif7_device },
+ { "A3SP", &scif8_device },
+ { "A3SP", &i2c1_device },
+ };
+
/* I2C work-around */
r8a7740_i2c_workaround(&i2c0_device);
r8a7740_i2c_workaround(&i2c1_device);
/* add devices */
platform_add_devices(r8a7740_early_devices,
ARRAY_SIZE(r8a7740_early_devices));
- platform_add_devices(r8a7740_devices_dt,
- ARRAY_SIZE(r8a7740_devices_dt));
platform_add_devices(r8a7740_late_devices,
ARRAY_SIZE(r8a7740_late_devices));
/* add devices to PM domain */
-
- rmobile_add_device_to_domain("A3SP", &scif0_device);
- rmobile_add_device_to_domain("A3SP", &scif1_device);
- rmobile_add_device_to_domain("A3SP", &scif2_device);
- rmobile_add_device_to_domain("A3SP", &scif3_device);
- rmobile_add_device_to_domain("A3SP", &scif4_device);
- rmobile_add_device_to_domain("A3SP", &scif5_device);
- rmobile_add_device_to_domain("A3SP", &scif6_device);
- rmobile_add_device_to_domain("A3SP", &scif7_device);
- rmobile_add_device_to_domain("A3SP", &scif8_device);
- rmobile_add_device_to_domain("A3SP", &i2c1_device);
+ rmobile_add_devices_to_domains(domain_devices,
+ ARRAY_SIZE(domain_devices));
}
void __init r8a7740_add_early_devices(void)
{
early_platform_add_devices(r8a7740_early_devices,
ARRAY_SIZE(r8a7740_early_devices));
- early_platform_add_devices(r8a7740_devices_dt,
- ARRAY_SIZE(r8a7740_devices_dt));
/* setup early console here as well */
shmobile_setup_console();
#ifdef CONFIG_USE_OF
-void __init r8a7740_add_early_devices_dt(void)
-{
- shmobile_setup_delay(800, 1, 3); /* Cortex-A9 @ 800MHz */
-
- early_platform_add_devices(r8a7740_early_devices,
- ARRAY_SIZE(r8a7740_early_devices));
-
- /* setup early console here as well */
- shmobile_setup_console();
-}
-
-void __init r8a7740_add_standard_devices_dt(void)
-{
- platform_add_devices(r8a7740_devices_dt,
- ARRAY_SIZE(r8a7740_devices_dt));
- of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
-}
-
-void __init r8a7740_init_delay(void)
-{
- shmobile_setup_delay(800, 1, 3); /* Cortex-A9 @ 800MHz */
-};
-
void __init r8a7740_init_irq_of(void)
{
void __iomem *intc_prio_base = ioremap_nocache(0xe6900010, 0x10);
static void __init r8a7740_generic_init(void)
{
- r8a7740_clock_init(0);
- r8a7740_add_standard_devices_dt();
+ r8a7740_meram_workaround();
+
+#ifdef CONFIG_CACHE_L2X0
+ /* Shared attribute override enable, 32K*8way */
+ l2x0_init(IOMEM(0xf0002000), 0x00400000, 0xc20f0fff);
+#endif
+ of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
+}
+
+#define RESCNT2 IOMEM(0xe6188020)
+static void r8a7740_restart(enum reboot_mode mode, const char *cmd)
+{
+ /* Do soft power on reset */
+ writel(1 << 31, RESCNT2);
}
static const char *r8a7740_boards_compat_dt[] __initdata = {
DT_MACHINE_START(R8A7740_DT, "Generic R8A7740 (Flattened Device Tree)")
.map_io = r8a7740_map_io,
- .init_early = r8a7740_init_delay,
+ .init_early = shmobile_init_delay,
.init_irq = r8a7740_init_irq_of,
.init_machine = r8a7740_generic_init,
+ .init_late = shmobile_init_late,
.dt_compat = r8a7740_boards_compat_dt,
+ .restart = r8a7740_restart,
MACHINE_END
#endif /* CONFIG_USE_OF */