ARM: sa11x0/pxa: convert OS timer registers to IOMEM

[platform/kernel/linux-arm64.git] / arch / arm / mach-sa1100 / time.c

diff --git a/arch/arm/mach-sa1100/time.c b/arch/arm/mach-sa1100/time.c
index 6af26e8..80702c9 100644 (file)
--- a/arch/arm/mach-sa1100/time.c
+++ b/arch/arm/mach-sa1100/time.c
@@ -22,7 +22,7 @@
 
 static u32 notrace sa1100_read_sched_clock(void)
 {
-       return OSCR;
+       return readl_relaxed(OSCR);
 }
 
 #define MIN_OSCR_DELTA 2
@@ -32,8 +32,8 @@ static irqreturn_t sa1100_ost0_interrupt(int irq, void *dev_id)
        struct clock_event_device *c = dev_id;
 
        /* Disarm the compare/match, signal the event. */
-       OIER &= ~OIER_E0;
-       OSSR = OSSR_M0;
+       writel_relaxed(readl_relaxed(OIER) & ~OIER_E0, OIER);
+       writel_relaxed(OSSR_M0, OSSR);
        c->event_handler(c);
 
        return IRQ_HANDLED;
@@ -44,10 +44,10 @@ sa1100_osmr0_set_next_event(unsigned long delta, struct clock_event_device *c)
 {
        unsigned long next, oscr;
 
-       OIER |= OIER_E0;
-       next = OSCR + delta;
-       OSMR0 = next;
-       oscr = OSCR;
+       writel_relaxed(readl_relaxed(OIER) | OIER_E0, OIER);
+       next = readl_relaxed(OSCR) + delta;
+       writel_relaxed(next, OSMR0);
+       oscr = readl_relaxed(OSCR);
 
        return (signed)(next - oscr) <= MIN_OSCR_DELTA ? -ETIME : 0;
 }
@@ -59,8 +59,8 @@ sa1100_osmr0_set_mode(enum clock_event_mode mode, struct clock_event_device *c)
        case CLOCK_EVT_MODE_ONESHOT:
        case CLOCK_EVT_MODE_UNUSED:
        case CLOCK_EVT_MODE_SHUTDOWN:
-               OIER &= ~OIER_E0;
-               OSSR = OSSR_M0;
+               writel_relaxed(readl_relaxed(OIER) & ~OIER_E0, OIER);
+               writel_relaxed(OSSR_M0, OSSR);
                break;
 
        case CLOCK_EVT_MODE_RESUME:
@@ -86,8 +86,8 @@ static struct irqaction sa1100_timer_irq = {
 
 static void __init sa1100_timer_init(void)
 {
-       OIER = 0;
-       OSSR = OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3;
+       writel_relaxed(0, OIER);
+       writel_relaxed(OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3, OSSR);
 
        setup_sched_clock(sa1100_read_sched_clock, 32, 3686400);
 
@@ -100,7 +100,7 @@ static void __init sa1100_timer_init(void)
 
        setup_irq(IRQ_OST0, &sa1100_timer_irq);
 
-       clocksource_mmio_init(&OSCR, "oscr", CLOCK_TICK_RATE, 200, 32,
+       clocksource_mmio_init(OSCR, "oscr", CLOCK_TICK_RATE, 200, 32,
                clocksource_mmio_readl_up);
        clockevents_register_device(&ckevt_sa1100_osmr0);
 }
@@ -110,26 +110,26 @@ unsigned long osmr[4], oier;
 
 static void sa1100_timer_suspend(void)
 {
-       osmr[0] = OSMR0;
-       osmr[1] = OSMR1;
-       osmr[2] = OSMR2;
-       osmr[3] = OSMR3;
-       oier = OIER;
+       osmr[0] = readl_relaxed(OSMR0);
+       osmr[1] = readl_relaxed(OSMR1);
+       osmr[2] = readl_relaxed(OSMR2);
+       osmr[3] = readl_relaxed(OSMR3);
+       oier = readl_relaxed(OIER);
 }
 
 static void sa1100_timer_resume(void)
 {
-       OSSR = 0x0f;
-       OSMR0 = osmr[0];
-       OSMR1 = osmr[1];
-       OSMR2 = osmr[2];
-       OSMR3 = osmr[3];
-       OIER = oier;
+       writel_relaxed(0x0f, OSSR);
+       writel_relaxed(osmr[0], OSMR0);
+       writel_relaxed(osmr[1], OSMR1);
+       writel_relaxed(osmr[2], OSMR2);
+       writel_relaxed(osmr[3], OSMR3);
+       writel_relaxed(oier, OIER);
 
        /*
         * OSMR0 is the system timer: make sure OSCR is sufficiently behind
         */
-       OSCR = OSMR0 - LATCH;
+       writel_relaxed(OSMR0 - LATCH, OSCR);
 }
 #else
 #define sa1100_timer_suspend NULL