Merge branch 'master' of git://git.denx.de/u-boot-spi
[platform/kernel/u-boot.git] / arch / arm / mach-rockchip / rk3399-board-spl.c
index 4f84ec1..0198c6c 100644 (file)
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * (C) Copyright 2016 Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:     GPL-2.0+
+ * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
  */
 
 #include <common.h>
-#include <debug_uart.h>
-#include <dm.h>
-#include <fdtdec.h>
-#include <led.h>
-#include <malloc.h>
-#include <mmc.h>
-#include <ram.h>
-#include <spl.h>
-#include <asm/gpio.h>
-#include <asm/io.h>
+#include <asm/arch/bootrom.h>
 #include <asm/arch/clock.h>
+#include <asm/arch/grf_rk3399.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/periph.h>
-#include <asm/arch/sdram.h>
-#include <asm/arch/timer.h>
+#include <asm/io.h>
+#include <debug_uart.h>
+#include <dm.h>
 #include <dm/pinctrl.h>
-#include <dm/root.h>
-#include <dm/test.h>
-#include <dm/util.h>
-#include <power/regulator.h>
+#include <ram.h>
+#include <spl.h>
+#include <syscon.h>
+
+void board_return_to_bootrom(void)
+{
+       back_to_bootrom(BROM_BOOT_NEXTSTAGE);
+}
 
-DECLARE_GLOBAL_DATA_PTR;
+static const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {
+       [BROM_BOOTSOURCE_EMMC] = "/sdhci@fe330000",
+       [BROM_BOOTSOURCE_SPINOR] = "/spi@ff1d0000",
+       [BROM_BOOTSOURCE_SD] = "/dwmmc@fe320000",
+};
 
-#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_OF_CONTROL)
-static int spl_node_to_boot_device(int node)
+const char *board_spl_was_booted_from(void)
 {
-       struct udevice *parent;
+       u32  bootdevice_brom_id = readl(RK3399_BROM_BOOTSOURCE_ID_ADDR);
+       const char *bootdevice_ofpath = NULL;
 
-       /*
-        * This should eventually move into the SPL code, once SPL becomes
-        * aware of the block-device layer.  Until then (and to avoid unneeded
-        * delays in getting this feature out, it lives at the board-level).
-        */
-       if (!uclass_get_device_by_of_offset(UCLASS_MMC, node, &parent)) {
-               struct udevice *dev;
-               struct blk_desc *desc = NULL;
-
-               for (device_find_first_child(parent, &dev);
-                    dev;
-                    device_find_next_child(&dev)) {
-                       if (device_get_uclass_id(dev) == UCLASS_BLK) {
-                               desc = dev_get_uclass_platdata(dev);
-                               break;
-                       }
-               }
-
-               if (!desc)
-                       return -ENOENT;
-
-               switch (desc->devnum) {
-               case 0:
-                       return BOOT_DEVICE_MMC1;
-               case 1:
-                       return BOOT_DEVICE_MMC2;
-               default:
-                       return -ENOSYS;
-               }
-       }
+       if (bootdevice_brom_id < ARRAY_SIZE(boot_devices))
+               bootdevice_ofpath = boot_devices[bootdevice_brom_id];
 
-       /*
-        * SPL doesn't differentiate SPI flashes, so we keep the detection
-        * brief and inaccurate... hopefully, the common SPL layer can be
-        * extended with awareness of the BLK layer (and matching OF_CONTROL)
-        * soon.
-        */
-       if (!uclass_get_device_by_of_offset(UCLASS_SPI_FLASH, node, &parent))
-               return BOOT_DEVICE_SPI;
+       if (bootdevice_ofpath)
+               debug("%s: brom_bootdevice_id %x maps to '%s'\n",
+                     __func__, bootdevice_brom_id, bootdevice_ofpath);
+       else
+               debug("%s: failed to resolve brom_bootdevice_id %x\n",
+                     __func__, bootdevice_brom_id);
 
-       return -1;
+       return bootdevice_ofpath;
 }
 
-void board_boot_order(u32 *spl_boot_list)
+u32 spl_boot_device(void)
 {
-       const void *blob = gd->fdt_blob;
-       int chosen_node = fdt_path_offset(blob, "/chosen");
-       int idx = 0;
-       int elem;
-       int boot_device;
-       int node;
-       const char *conf;
-
-       if (chosen_node < 0) {
-               debug("%s: /chosen not found, using spl_boot_device()\n",
-                     __func__);
-               spl_boot_list[0] = spl_boot_device();
-               return;
-       }
+       u32 boot_device = BOOT_DEVICE_MMC1;
 
-       for (elem = 0;
-            (conf = fdt_stringlist_get(blob, chosen_node,
-                                       "u-boot,spl-boot-order", elem, NULL));
-            elem++) {
-               /* First check if the list element is an alias */
-               const char *alias = fdt_get_alias(blob, conf);
-               if (alias)
-                       conf = alias;
-
-               /* Try to resolve the config item (or alias) as a path */
-               node = fdt_path_offset(blob, conf);
-               if (node < 0) {
-                       debug("%s: could not find %s in FDT", __func__, conf);
-                       continue;
-               }
-
-               /* Try to map this back onto SPL boot devices */
-               boot_device = spl_node_to_boot_device(node);
-               if (boot_device < 0) {
-                       debug("%s: could not map node @%x to a boot-device\n",
-                             __func__, node);
-                       continue;
-               }
-
-               spl_boot_list[idx++] = boot_device;
-       }
+       if (CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM))
+               return BOOT_DEVICE_BOOTROM;
 
-       /* If we had no matches, fall back to spl_boot_device */
-       if (idx == 0)
-               spl_boot_list[0] = spl_boot_device();
+       return boot_device;
 }
-#endif
 
-u32 spl_boot_device(void)
+const char *spl_decode_boot_device(u32 boot_device)
 {
-       return BOOT_DEVICE_MMC1;
+       int i;
+       static const struct {
+               u32 boot_device;
+               const char *ofpath;
+       } spl_boot_devices_tbl[] = {
+               { BOOT_DEVICE_MMC1, "/dwmmc@fe320000" },
+               { BOOT_DEVICE_MMC2, "/sdhci@fe330000" },
+               { BOOT_DEVICE_SPI, "/spi@ff1d0000" },
+       };
+
+       for (i = 0; i < ARRAY_SIZE(spl_boot_devices_tbl); ++i)
+               if (spl_boot_devices_tbl[i].boot_device == boot_device)
+                       return spl_boot_devices_tbl[i].ofpath;
+
+       return NULL;
 }
 
-u32 spl_boot_mode(const u32 boot_device)
+void spl_perform_fixups(struct spl_image_info *spl_image)
 {
-       return MMCSD_MODE_RAW;
+       void *blob = spl_image->fdt_addr;
+       const char *boot_ofpath;
+       int chosen;
+
+       /*
+        * Inject the ofpath of the device the full U-Boot (or Linux in
+        * Falcon-mode) was booted from into the FDT, if a FDT has been
+        * loaded at the same time.
+        */
+       if (!blob)
+               return;
+
+       boot_ofpath = spl_decode_boot_device(spl_image->boot_device);
+       if (!boot_ofpath) {
+               pr_err("%s: could not map boot_device to ofpath\n", __func__);
+               return;
+       }
+
+       chosen = fdt_find_or_add_subnode(blob, 0, "chosen");
+       if (chosen < 0) {
+               pr_err("%s: could not find/create '/chosen'\n", __func__);
+               return;
+       }
+       fdt_setprop_string(blob, chosen,
+                          "u-boot,spl-boot-device", boot_ofpath);
 }
 
 #define TIMER_CHN10_BASE       0xff8680a0
@@ -156,19 +125,21 @@ void secure_timer_init(void)
        writel(TIMER_EN | TIMER_FMODE, TIMER_CHN10_BASE + TIMER_CONTROL_REG);
 }
 
-#define GRF_EMMCCORE_CON11 0xff77f02c
-void board_init_f(ulong dummy)
+void board_debug_uart_init(void)
 {
-       struct udevice *pinctrl;
-       struct udevice *dev;
-       int ret;
-
-       /* Example code showing how to enable the debug UART on RK3288 */
-#include <asm/arch/grf_rk3399.h>
-       /* Enable early UART2 channel C on the RK3399 */
 #define GRF_BASE       0xff770000
        struct rk3399_grf_regs * const grf = (void *)GRF_BASE;
 
+#if defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xff180000)
+       /* Enable early UART0 on the RK3399 */
+       rk_clrsetreg(&grf->gpio2c_iomux,
+                    GRF_GPIO2C0_SEL_MASK,
+                    GRF_UART0BT_SIN << GRF_GPIO2C0_SEL_SHIFT);
+       rk_clrsetreg(&grf->gpio2c_iomux,
+                    GRF_GPIO2C1_SEL_MASK,
+                    GRF_UART0BT_SOUT << GRF_GPIO2C1_SEL_SHIFT);
+#else
+       /* Enable early UART2 channel C on the RK3399 */
        rk_clrsetreg(&grf->gpio4c_iomux,
                     GRF_GPIO4C3_SEL_MASK,
                     GRF_UART2DGBC_SIN << GRF_GPIO4C3_SEL_SHIFT);
@@ -179,6 +150,17 @@ void board_init_f(ulong dummy)
        rk_clrsetreg(&grf->soc_con7,
                     GRF_UART_DBG_SEL_MASK,
                     GRF_UART_DBG_SEL_C << GRF_UART_DBG_SEL_SHIFT);
+#endif
+}
+
+void board_init_f(ulong dummy)
+{
+       struct udevice *pinctrl;
+       struct udevice *dev;
+       struct rk3399_pmusgrf_regs *sgrf;
+       struct rk3399_grf_regs *grf;
+       int ret;
+
 #define EARLY_UART
 #ifdef EARLY_UART
        /*
@@ -190,10 +172,8 @@ void board_init_f(ulong dummy)
         * printascii("string");
         */
        debug_uart_init();
-       printascii("U-Boot SPL board init");
+       printascii("U-Boot SPL board init\n");
 #endif
-       /*  Emmc clock generator: disable the clock multipilier */
-       rk_clrreg(GRF_EMMCCORE_CON11, 0x0ff);
 
        ret = spl_early_init();
        if (ret) {
@@ -201,51 +181,38 @@ void board_init_f(ulong dummy)
                hang();
        }
 
+       /*
+        * Disable DDR and SRAM security regions.
+        *
+        * As we are entered from the BootROM, the region from
+        * 0x0 through 0xfffff (i.e. the first MB of memory) will
+        * be protected. This will cause issues with the DW_MMC
+        * driver, which tries to DMA from/to the stack (likely)
+        * located in this range.
+        */
+       sgrf = syscon_get_first_range(ROCKCHIP_SYSCON_PMUSGRF);
+       rk_clrsetreg(&sgrf->ddr_rgn_con[16], 0x1ff, 0);
+       rk_clrreg(&sgrf->slv_secure_con4, 0x2000);
+
+       /*  eMMC clock generator: disable the clock multipilier */
+       grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+       rk_clrreg(&grf->emmccore_con[11], 0x0ff);
+
        secure_timer_init();
 
        ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
        if (ret) {
-               debug("Pinctrl init failed: %d\n", ret);
+               pr_err("Pinctrl init failed: %d\n", ret);
                return;
        }
 
        ret = uclass_get_device(UCLASS_RAM, 0, &dev);
        if (ret) {
-               debug("DRAM init failed: %d\n", ret);
+               pr_err("DRAM init failed: %d\n", ret);
                return;
        }
 }
 
-void spl_board_init(void)
-{
-       struct udevice *pinctrl;
-       int ret;
-
-       ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
-       if (ret) {
-               debug("%s: Cannot find pinctrl device\n", __func__);
-               goto err;
-       }
-
-       /* Enable debug UART */
-       ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_UART_DBG);
-       if (ret) {
-               debug("%s: Failed to set up console UART\n", __func__);
-               goto err;
-       }
-
-       preloader_console_init();
-#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
-       back_to_bootrom();
-#endif
-       return;
-err:
-       printf("spl_board_init: Error %d\n", ret);
-
-       /* No way to report error here */
-       hang();
-}
-
 #ifdef CONFIG_SPL_LOAD_FIT
 int board_fit_config_name_match(const char *name)
 {