Merge branch 'master' of git://git.denx.de/u-boot-samsung

[platform/kernel/u-boot.git] / arch / arm / mach-rockchip / rk3399 / sdram_rk3399.c

diff --git a/arch/arm/mach-rockchip/rk3399/sdram_rk3399.c b/arch/arm/mach-rockchip/rk3399/sdram_rk3399.c
index 749b52c..1b91bb1 100644 (file)
--- a/arch/arm/mach-rockchip/rk3399/sdram_rk3399.c
+++ b/arch/arm/mach-rockchip/rk3399/sdram_rk3399.c
@@ -5,6 +5,7 @@
  *
  * Adapted from coreboot.
  */
+
 #include <common.h>
 #include <clk.h>
 #include <dm.h>
@@ -19,6 +20,7 @@
 #include <asm/arch/grf_rk3399.h>
 #include <asm/arch/hardware.h>
 #include <linux/err.h>
+#include <time.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 struct chan_info {
@@ -506,6 +508,7 @@ static int pctl_cfg(const struct chan_info *chan, u32 channel,
        u32 tmp, tmp1, tmp2;
        u32 pwrup_srefresh_exit;
        int ret;
+       const ulong timeout_ms = 200;
 
        /*
         * work around controller bug:
@@ -588,13 +591,15 @@ static int pctl_cfg(const struct chan_info *chan, u32 channel,
        clrsetbits_le32(&denali_phy[957], 0x3 << 24, 0x2 << 24);
 
        /* Wating for PHY and DRAM init complete */
-       tmp = 0;
-       while (!(readl(&denali_ctl[203]) & (1 << 3))) {
-               mdelay(10);
-               tmp++;
-               if (tmp > 10)
+       tmp = get_timer(0);
+       do {
+               if (get_timer(tmp) > timeout_ms) {
+                       error("DRAM (%s): phy failed to lock within  %ld ms\n",
+                             __func__, timeout_ms);
                        return -ETIME;
-       }
+               }
+       } while (!(readl(&denali_ctl[203]) & (1 << 3)));
+       debug("DRAM (%s): phy locked after %ld ms\n", __func__, get_timer(tmp));
 
        clrsetbits_le32(&denali_ctl[68], PWRUP_SREFRESH_EXIT,
                        pwrup_srefresh_exit);
@@ -1082,7 +1087,7 @@ static int sdram_init(struct dram_info *dram,
 
        debug("Starting SDRAM initialization...\n");
 
-       if ((dramtype == DDR3 && ddr_freq > 800) ||
+       if ((dramtype == DDR3 && ddr_freq > 933) ||
            (dramtype == LPDDR3 && ddr_freq > 933) ||
            (dramtype == LPDDR4 && ddr_freq > 800)) {
                debug("SDRAM frequency is to high!");
@@ -1128,7 +1133,7 @@ static int rk3399_dmc_ofdata_to_platdata(struct udevice *dev)
 #if !CONFIG_IS_ENABLED(OF_PLATDATA)
        struct rockchip_dmc_plat *plat = dev_get_platdata(dev);
        const void *blob = gd->fdt_blob;
-       int node = dev->of_offset;
+       int node = dev_of_offset(dev);
        int ret;
 
        ret = fdtdec_get_int_array(blob, node, "rockchip,sdram-params",
@@ -1280,6 +1285,8 @@ static int rk3399_dmc_probe(struct udevice *dev)
 
        priv->pmugrf = syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF);
        debug("%s: pmugrf=%p\n", __func__, priv->pmugrf);
+       priv->info.base = 0;
+       priv->info.size = sdram_size_mb(priv) << 20;
 #endif
        return 0;
 }
@@ -1288,9 +1295,7 @@ static int rk3399_dmc_get_info(struct udevice *dev, struct ram_info *info)
 {
        struct dram_info *priv = dev_get_priv(dev);
 
-       info = &priv->info;
-       priv->info.base = 0;
-       priv->info.size = sdram_size_mb(priv) << 20;
+       *info = priv->info;
 
        return 0;
 }
@@ -1314,8 +1319,8 @@ U_BOOT_DRIVER(dmc_rk3399) = {
        .ofdata_to_platdata = rk3399_dmc_ofdata_to_platdata,
 #endif
        .probe = rk3399_dmc_probe,
-#ifdef CONFIG_SPL_BUILD
        .priv_auto_alloc_size = sizeof(struct dram_info),
+#ifdef CONFIG_SPL_BUILD
        .platdata_auto_alloc_size = sizeof(struct rockchip_dmc_plat),
 #endif
 };