dm: gpio: Allow control of GPIO uclass in SPL
[platform/kernel/u-boot.git] / arch / arm / mach-omap2 / omap5 / hwinit.c
index c520a63..56458ce 100644 (file)
@@ -1,3 +1,4 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  *
  * Functions for omap5 based boards.
@@ -9,8 +10,6 @@
  *     Aneesh V        <aneesh@ti.com>
  *     Steve Sakoman   <steve@sakoman.com>
  *     Sricharan       <r.sricharan@ti.com>
- *
- * SPDX-License-Identifier:    GPL-2.0+
  */
 #include <common.h>
 #include <palmas.h>
 #include <asm/emif.h>
 #include <asm/omap_common.h>
 
-DECLARE_GLOBAL_DATA_PTR;
-
 u32 *const omap_si_rev = (u32 *)OMAP_SRAM_SCRATCH_OMAP_REV;
 
-#ifndef CONFIG_DM_GPIO
+#if !CONFIG_IS_ENABLED(DM_GPIO)
 static struct gpio_bank gpio_bank_54xx[8] = {
        { (void *)OMAP54XX_GPIO1_BASE },
        { (void *)OMAP54XX_GPIO2_BASE },
@@ -380,12 +377,36 @@ void init_omap_revision(void)
        case DRA722_CONTROL_ID_CODE_ES2_0:
                *omap_si_rev = DRA722_ES2_0;
                break;
+       case DRA722_CONTROL_ID_CODE_ES2_1:
+               *omap_si_rev = DRA722_ES2_1;
+               break;
        default:
                *omap_si_rev = OMAP5430_SILICON_ID_INVALID;
        }
        init_cpu_configuration();
 }
 
+void init_package_revision(void)
+{
+       unsigned int die_id[4] = { 0 };
+       u8 package;
+
+       omap_die_id(die_id);
+       package = (die_id[2] >> 16) & 0x3;
+
+       if (is_dra76x()) {
+               switch (package) {
+               case DRA762_ABZ_PACKAGE:
+                       *omap_si_rev = DRA762_ABZ_ES1_0;
+                       break;
+               case DRA762_ACD_PACKAGE:
+               default:
+                       *omap_si_rev = DRA762_ACD_ES1_0;
+                       break;
+               }
+       }
+}
+
 void omap_die_id(unsigned int *die_id)
 {
        die_id[0] = readl((*ctrl)->control_std_fuse_die_id_0);