#include <common.h>
#include <cpu_func.h>
+#include <image.h>
+#include <init.h>
+#include <log.h>
#include <spl.h>
+#include <asm/global_data.h>
#include "common.h"
#include <dm.h>
#include <remoteproc.h>
+#include <asm/cache.h>
#include <linux/soc/ti/ti_sci_protocol.h>
#include <fdt_support.h>
#include <asm/arch/sys_proto.h>
#include <fs.h>
#include <env.h>
#include <elf.h>
+#include <soc.h>
+
+#if IS_ENABLED(CONFIG_SYS_K3_SPL_ATF)
+enum {
+ IMAGE_ID_ATF,
+ IMAGE_ID_OPTEE,
+ IMAGE_ID_SPL,
+ IMAGE_ID_DM_FW,
+ IMAGE_AMT,
+};
+
+#if CONFIG_IS_ENABLED(FIT_IMAGE_POST_PROCESS)
+static const char *image_os_match[IMAGE_AMT] = {
+ "arm-trusted-firmware",
+ "tee",
+ "U-Boot",
+ "DM",
+};
+#endif
+
+static struct image_info fit_image_info[IMAGE_AMT];
+#endif
struct ti_sci_handle *get_ti_sci_handle(void)
{
int ret;
ret = uclass_get_device_by_driver(UCLASS_FIRMWARE,
- DM_GET_DRIVER(ti_sci), &dev);
+ DM_DRIVER_GET(ti_sci), &dev);
if (ret)
panic("Failed to get SYSFW (%d)\n", ret);
ti_sci->version.firmware_revision, fw_desc);
}
+void mmr_unlock(phys_addr_t base, u32 partition)
+{
+ /* Translate the base address */
+ phys_addr_t part_base = base + partition * CTRL_MMR0_PARTITION_SIZE;
+
+ /* Unlock the requested partition if locked using two-step sequence */
+ writel(CTRLMMR_LOCK_KICK0_UNLOCK_VAL, part_base + CTRLMMR_LOCK_KICK0);
+ writel(CTRLMMR_LOCK_KICK1_UNLOCK_VAL, part_base + CTRLMMR_LOCK_KICK1);
+}
+
+bool is_rom_loaded_sysfw(struct rom_extended_boot_data *data)
+{
+ if (strncmp(data->header, K3_ROM_BOOT_HEADER_MAGIC, 7))
+ return false;
+
+ return data->num_components > 1;
+}
+
DECLARE_GLOBAL_DATA_PTR;
#ifdef CONFIG_K3_EARLY_CONS
}
#endif
-#ifdef CONFIG_SYS_K3_SPL_ATF
+#if IS_ENABLED(CONFIG_SYS_K3_SPL_ATF)
void init_env(void)
{
#endif
}
-#ifdef CONFIG_FS_LOADER
int load_firmware(char *name_fw, char *name_loadaddr, u32 *loadaddr)
{
struct udevice *fsdev;
char *name = NULL;
int size = 0;
+ if (!IS_ENABLED(CONFIG_FS_LOADER))
+ return 0;
+
*loadaddr = 0;
#ifdef CONFIG_SPL_ENV_SUPPORT
switch (spl_boot_device()) {
return size;
}
-#else
-int load_firmware(char *name_fw, char *name_loadaddr, u32 *loadaddr)
-{
- return 0;
-}
-#endif
-__weak void start_non_linux_remote_cores(void)
+__weak void release_resources_for_core_shutdown(void)
{
+ debug("%s not implemented...\n", __func__);
}
void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)
typedef void __noreturn (*image_entry_noargs_t)(void);
struct ti_sci_handle *ti_sci = get_ti_sci_handle();
u32 loadaddr = 0;
- int ret, size;
+ int ret, size = 0, shut_cpu = 0;
/* Release all the exclusive devices held by SPL before starting ATF */
ti_sci->ops.dev_ops.release_exclusive_devices(ti_sci);
panic("rproc failed to be initialized (%d)\n", ret);
init_env();
- start_non_linux_remote_cores();
- size = load_firmware("name_mcur5f0_0fw", "addr_mcur5f0_0load",
- &loadaddr);
+ if (!fit_image_info[IMAGE_ID_DM_FW].image_start) {
+ size = load_firmware("name_mcur5f0_0fw", "addr_mcur5f0_0load",
+ &loadaddr);
+ }
/*
* It is assumed that remoteproc device 1 is the corresponding
* Cortex-A core which runs ATF. Make sure DT reflects the same.
*/
- ret = rproc_load(1, spl_image->entry_point, 0x200);
+ if (!fit_image_info[IMAGE_ID_ATF].image_start)
+ fit_image_info[IMAGE_ID_ATF].image_start =
+ spl_image->entry_point;
+
+ ret = rproc_load(1, fit_image_info[IMAGE_ID_ATF].image_start, 0x200);
if (ret)
panic("%s: ATF failed to load on rproc (%d)\n", __func__, ret);
+ if (!fit_image_info[IMAGE_ID_DM_FW].image_len &&
+ !(size > 0 && valid_elf_image(loadaddr))) {
+ shut_cpu = 1;
+ goto start_arm64;
+ }
+
+ if (!fit_image_info[IMAGE_ID_DM_FW].image_start) {
+ loadaddr = load_elf_image_phdr(loadaddr);
+ } else {
+ loadaddr = fit_image_info[IMAGE_ID_DM_FW].image_start;
+ if (valid_elf_image(loadaddr))
+ loadaddr = load_elf_image_phdr(loadaddr);
+ }
+
+ debug("%s: jumping to address %x\n", __func__, loadaddr);
+
+start_arm64:
/* Add an extra newline to differentiate the ATF logs from SPL */
printf("Starting ATF on ARM64 core...\n\n");
ret = rproc_start(1);
if (ret)
panic("%s: ATF failed to start on rproc (%d)\n", __func__, ret);
- if (!(size > 0 && valid_elf_image(loadaddr))) {
+
+ if (shut_cpu) {
debug("Shutting down...\n");
release_resources_for_core_shutdown();
while (1)
asm volatile("wfe");
}
-
- image_entry_noargs_t image_entry =
- (image_entry_noargs_t)load_elf_image_phdr(loadaddr);
+ image_entry_noargs_t image_entry = (image_entry_noargs_t)loadaddr;
image_entry();
}
#endif
+#if CONFIG_IS_ENABLED(FIT_IMAGE_POST_PROCESS)
+void board_fit_image_post_process(const void *fit, int node, void **p_image,
+ size_t *p_size)
+{
+#if IS_ENABLED(CONFIG_SYS_K3_SPL_ATF)
+ int len;
+ int i;
+ const char *os;
+ u32 addr;
+
+ os = fdt_getprop(fit, node, "os", &len);
+ addr = fdt_getprop_u32_default_node(fit, node, 0, "entry", -1);
+
+ debug("%s: processing image: addr=%x, size=%d, os=%s\n", __func__,
+ addr, *p_size, os);
+
+ for (i = 0; i < IMAGE_AMT; i++) {
+ if (!strcmp(os, image_os_match[i])) {
+ fit_image_info[i].image_start = addr;
+ fit_image_info[i].image_len = *p_size;
+ debug("%s: matched image for ID %d\n", __func__, i);
+ break;
+ }
+ }
+#endif
+
+ ti_secure_image_post_process(p_image, p_size);
+}
+#endif
+
#if defined(CONFIG_OF_LIBFDT)
int fdt_fixup_msmc_ram(void *blob, char *parent_path, char *node_name)
{
#endif
#ifndef CONFIG_SYSRESET
-void reset_cpu(ulong ignored)
+void reset_cpu(void)
{
}
#endif
+enum k3_device_type get_device_type(void)
+{
+ u32 sys_status = readl(K3_SEC_MGR_SYS_STATUS);
+
+ u32 sys_dev_type = (sys_status & SYS_STATUS_DEV_TYPE_MASK) >>
+ SYS_STATUS_DEV_TYPE_SHIFT;
+
+ u32 sys_sub_type = (sys_status & SYS_STATUS_SUB_TYPE_MASK) >>
+ SYS_STATUS_SUB_TYPE_SHIFT;
+
+ switch (sys_dev_type) {
+ case SYS_STATUS_DEV_TYPE_GP:
+ return K3_DEVICE_TYPE_GP;
+ case SYS_STATUS_DEV_TYPE_TEST:
+ return K3_DEVICE_TYPE_TEST;
+ case SYS_STATUS_DEV_TYPE_EMU:
+ return K3_DEVICE_TYPE_EMU;
+ case SYS_STATUS_DEV_TYPE_HS:
+ if (sys_sub_type == SYS_STATUS_SUB_TYPE_VAL_FS)
+ return K3_DEVICE_TYPE_HS_FS;
+ else
+ return K3_DEVICE_TYPE_HS_SE;
+ default:
+ return K3_DEVICE_TYPE_BAD;
+ }
+}
+
#if defined(CONFIG_DISPLAY_CPUINFO)
-int print_cpuinfo(void)
+static const char *get_device_type_name(void)
{
- u32 soc, rev;
- char *name;
+ enum k3_device_type type = get_device_type();
+
+ switch (type) {
+ case K3_DEVICE_TYPE_GP:
+ return "GP";
+ case K3_DEVICE_TYPE_TEST:
+ return "TEST";
+ case K3_DEVICE_TYPE_EMU:
+ return "EMU";
+ case K3_DEVICE_TYPE_HS_FS:
+ return "HS-FS";
+ case K3_DEVICE_TYPE_HS_SE:
+ return "HS-SE";
+ default:
+ return "BAD";
+ }
+}
- soc = (readl(CTRLMMR_WKUP_JTAG_DEVICE_ID) &
- DEVICE_ID_FAMILY_MASK) >> DEVICE_ID_FAMILY_SHIFT;
- rev = (readl(CTRLMMR_WKUP_JTAG_ID) &
- JTAG_ID_VARIANT_MASK) >> JTAG_ID_VARIANT_SHIFT;
+int print_cpuinfo(void)
+{
+ struct udevice *soc;
+ char name[64];
+ int ret;
printf("SoC: ");
- switch (soc) {
- case AM654:
- name = "AM654";
- break;
- case J721E:
- name = "J721E";
- break;
- default:
- name = "Unknown Silicon";
- };
- printf("%s SR ", name);
- switch (rev) {
- case REV_PG1_0:
- name = "1.0";
- break;
- case REV_PG2_0:
- name = "2.0";
- break;
- default:
- name = "Unknown Revision";
- };
- printf("%s\n", name);
+ ret = soc_get(&soc);
+ if (ret) {
+ printf("UNKNOWN\n");
+ return 0;
+ }
+
+ ret = soc_get_family(soc, name, 64);
+ if (!ret) {
+ printf("%s ", name);
+ }
+
+ ret = soc_get_revision(soc, name, 64);
+ if (!ret) {
+ printf("%s ", name);
+ }
+
+ printf("%s\n", get_device_type_name());
return 0;
}
#endif
+bool soc_is_j721e(void)
+{
+ u32 soc;
+
+ soc = (readl(CTRLMMR_WKUP_JTAG_ID) &
+ JTAG_ID_PARTNO_MASK) >> JTAG_ID_PARTNO_SHIFT;
+
+ return soc == J721E;
+}
+
+bool soc_is_j7200(void)
+{
+ u32 soc;
+
+ soc = (readl(CTRLMMR_WKUP_JTAG_ID) &
+ JTAG_ID_PARTNO_MASK) >> JTAG_ID_PARTNO_SHIFT;
+
+ return soc == J7200;
+}
+
#ifdef CONFIG_ARM64
void board_prep_linux(bootm_headers_t *images)
{
}
}
}
+
+void spl_enable_dcache(void)
+{
+#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
+ phys_addr_t ram_top = CONFIG_SYS_SDRAM_BASE;
+
+ dram_init();
+
+ /* reserve TLB table */
+ gd->arch.tlb_size = PGTABLE_SIZE;
+
+ ram_top += get_effective_memsize();
+ /* keep ram_top in the 32-bit address space */
+ if (ram_top >= 0x100000000)
+ ram_top = (phys_addr_t) 0x100000000;
+
+ gd->arch.tlb_addr = ram_top - gd->arch.tlb_size;
+ debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
+ gd->arch.tlb_addr + gd->arch.tlb_size);
+
+ dcache_enable();
+#endif
+}
+
+#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
+void spl_board_prepare_for_boot(void)
+{
+ dcache_disable();
+}
+
+void spl_board_prepare_for_linux(void)
+{
+ dcache_disable();
+}
+#endif
+
+int misc_init_r(void)
+{
+ if (IS_ENABLED(CONFIG_TI_AM65_CPSW_NUSS)) {
+ struct udevice *dev;
+ int ret;
+
+ ret = uclass_get_device_by_driver(UCLASS_MISC,
+ DM_DRIVER_GET(am65_cpsw_nuss),
+ &dev);
+ if (ret)
+ printf("Failed to probe am65_cpsw_nuss driver\n");
+ }
+
+ return 0;
+}
projects / platform / kernel / u-boot.git / blobdiff