+// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright 2015 Freescale Semiconductor, Inc.
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#include <asm/io.h>
}
}
-void imx_set_wdog_powerdown(bool enable)
+void imx_wdog_disable_powerdown(void)
{
struct wdog_regs *wdog1 = (struct wdog_regs *)WDOG1_BASE_ADDR;
struct wdog_regs *wdog2 = (struct wdog_regs *)WDOG2_BASE_ADDR;
#endif
/* Write to the PDE (Power Down Enable) bit */
- writew(enable, &wdog1->wmcr);
- writew(enable, &wdog2->wmcr);
+ writew(0, &wdog1->wmcr);
+ writew(0, &wdog2->wmcr);
- if (is_mx6sx() || is_mx6ul() || is_mx7())
- writew(enable, &wdog3->wmcr);
+ if (is_mx6sx() || is_mx6ul() || is_mx6ull() || is_mx7())
+ writew(0, &wdog3->wmcr);
#ifdef CONFIG_MX7D
- writew(enable, &wdog4->wmcr);
+ writew(0, &wdog4->wmcr);
#endif
}
#ifdef CONFIG_CMD_BMODE
void boot_mode_apply(unsigned cfg_val)
{
- unsigned reg;
+#ifdef CONFIG_MX6
+ const u32 bmode = IMX6_SRC_GPR10_BMODE;
+#elif CONFIG_MX7
+ const u32 bmode = IMX7_SRC_GPR10_BMODE;
+#endif
struct src *psrc = (struct src *)SRC_BASE_ADDR;
+ unsigned reg;
+
writel(cfg_val, &psrc->gpr9);
reg = readl(&psrc->gpr10);
if (cfg_val)
- reg |= 1 << 28;
+ reg |= bmode;
else
- reg &= ~(1 << 28);
+ reg &= ~bmode;
writel(reg, &psrc->gpr10);
}
#endif
#if defined(CONFIG_MX6)
u32 imx6_src_get_boot_mode(void)
{
- if (imx6_is_bmode_from_gpr9())
+ if (readl(&src_base->gpr10) & IMX6_SRC_GPR10_BMODE)
return readl(&src_base->gpr9);
else
return readl(&src_base->sbmr1);