#define _EMIF_H_
#include <asm/types.h>
#include <common.h>
+#include <asm/io.h>
/* Base address */
#define EMIF1_BASE 0x4c000000
#define EMIF2_BASE 0x4d000000
+#define EMIF_4D 0x4
+#define EMIF_4D5 0x5
+
/* Registers shifts, masks and values */
/* EMIF_MOD_ID_REV */
u32 emif_ddr_phy_ctrl_1;
u32 emif_ddr_phy_ctrl_1_shdw;
u32 emif_ddr_phy_ctrl_2;
- u32 padding7[12];
+ u32 padding7[4];
+ u32 emif_prio_class_serv_map;
+ u32 emif_connect_id_serv_1_map;
+ u32 emif_connect_id_serv_2_map;
+ u32 padding8[5];
u32 emif_rd_wr_exec_thresh;
- u32 padding8[7];
+ u32 emif_cos_config;
+ u32 padding9[6];
u32 emif_ddr_phy_status[21];
- u32 padding9[27];
+ u32 padding10[27];
u32 emif_ddr_ext_phy_ctrl_1;
u32 emif_ddr_ext_phy_ctrl_1_shdw;
u32 emif_ddr_ext_phy_ctrl_2;
u32 emif_rd_wr_lvl_rmp_ctl;
u32 emif_rd_wr_lvl_ctl;
u32 emif_rd_wr_exec_thresh;
+ u32 emif_prio_class_serv_map;
+ u32 emif_connect_id_serv_1_map;
+ u32 emif_connect_id_serv_2_map;
+ u32 emif_cos_config;
};
struct lpddr2_mr_regs {
u32 write_reg;
};
+static inline u32 get_emif_rev(u32 base)
+{
+ struct emif_reg_struct *emif = (struct emif_reg_struct *)base;
+
+ return (readl(&emif->emif_mod_id_rev) & EMIF_REG_MAJOR_REVISION_MASK)
+ >> EMIF_REG_MAJOR_REVISION_SHIFT;
+}
+
+/*
+ * Get SDRAM type connected to EMIF.
+ * Assuming similar SDRAM parts are connected to both EMIF's
+ * which is typically the case. So it is sufficient to get
+ * SDRAM type from EMIF1.
+ */
+static inline u32 emif_sdram_type(void)
+{
+ struct emif_reg_struct *emif = (struct emif_reg_struct *)EMIF1_BASE;
+
+ return (readl(&emif->emif_sdram_config) &
+ EMIF_REG_SDRAM_TYPE_MASK) >> EMIF_REG_SDRAM_TYPE_SHIFT;
+}
+
/* assert macros */
#if defined(DEBUG)
#define emif_assert(c) ({ if (!(c)) for (;;); })