#define CONTROL_PADCONF_CORE (OMAP44XX_L4_CORE_BASE + 0x100000)
#define CONTROL_PADCONF_WKUP (OMAP44XX_L4_CORE_BASE + 0x31E000)
+/* LPDDR2 IO regs */
+#define LPDDR2_IO_REGS_BASE 0x4A100638
+
+#define CONTROL_EFUSE_2 0x4A100704
+
/* CONTROL_ID_CODE */
#define CONTROL_ID_CODE 0x4A002204