Merge branch 'master' of git://git.denx.de/u-boot

[platform/kernel/u-boot.git] / arch / arm / include / asm / arch-omap3 / sys_proto.h

diff --git a/arch/arm/include/asm/arch-omap3/sys_proto.h b/arch/arm/include/asm/arch-omap3/sys_proto.h
index 7b60051..24563c0 100644 (file)
--- a/arch/arm/include/asm/arch-omap3/sys_proto.h
+++ b/arch/arm/include/asm/arch-omap3/sys_proto.h
@@ -3,23 +3,12 @@
  * Texas Instruments, <www.ti.com>
  * Richard Woodruff <r-woodruff2@ti.com>
  *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR /PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
-  */
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
 #ifndef _SYS_PROTO_H_
 #define _SYS_PROTO_H_
+#include <linux/mtd/omap_gpmc.h>
+#include <asm/omap_common.h>
 
 typedef struct {
        u32 mtype;
@@ -32,12 +21,26 @@ struct emu_hal_params {
        u32 param1;
 };
 
+/* Board SDRC timing values */
+struct board_sdrc_timings {
+       u32 sharing;
+       u32 mcfg;
+       u32 ctrla;
+       u32 ctrlb;
+       u32 rfr_ctrl;
+       u32 mr;
+};
+
 void prcm_init(void);
 void per_clocks_enable(void);
+void ehci_clocks_enable(void);
 
 void memif_init(void);
 void sdrc_init(void);
 void do_sdrc_init(u32, u32);
+
+void get_board_mem_timings(struct board_sdrc_timings *timings);
+void identify_nand_chip(int *mfr, int *id);
 void emif4_init(void);
 void gpmc_init(void);
 void enable_gpmc_cs_config(const u32 *gpmc_config, struct gpmc_cs *cs, u32 base,
@@ -49,8 +52,6 @@ void set_muxconf_regs(void);
 u32 get_cpu_family(void);
 u32 get_cpu_rev(void);
 u32 get_sku_id(void);
-u32 get_mem_type(void);
-u32 get_sysboot_value(void);
 u32 is_gpmc_muxed(void);
 u32 get_gpmc0_type(void);
 u32 get_gpmc0_width(void);
@@ -62,14 +63,15 @@ void secureworld_exit(void);
 void try_unlock_memory(void);
 u32 get_boot_type(void);
 void invalidate_dcache(u32);
-void sr32(void *, u32, u32, u32);
 u32 wait_on_value(u32, u32, void *, u32);
+void cancel_out(u32 *num, u32 *den, u32 den_limit);
 void sdelay(unsigned long);
 void make_cs1_contiguous(void);
-void omap_nand_switch_ecc(int);
+void omap_nand_switch_ecc(uint32_t, uint32_t);
 void power_init_r(void);
-void dieid_num_r(void);
 void do_omap3_emu_romcode_call(u32 service_id, u32 parameters);
-void omap3_gp_romcode_call(u32 service_id, u32 parameter);
-void omap_rev_string(char *omap_rev_string);
+void omap3_set_aux_cr_secure(u32 acr);
+u32 warm_reset(void);
+
+void save_omap_boot_params(void);
 #endif