Merge tag 'tpm-030822' of https://source.denx.de/u-boot/custodians/u-boot-tpm

[platform/kernel/u-boot.git] / arch / arm / include / asm / arch-fsl-layerscape / config.h

diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h b/arch/arm/include/asm/arch-fsl-layerscape/config.h
index 733373e..1791b97 100644 (file)
--- a/arch/arm/include/asm/arch-fsl-layerscape/config.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h
@@ -40,14 +40,6 @@
 #define CONFIG_SYS_DDR_BLOCK1_SIZE     ((phys_size_t)2 << 30)
 #define CONFIG_MAX_MEM_MAPPED          CONFIG_SYS_DDR_BLOCK1_SIZE
 
-#define CONFIG_SYS_FSL_CCSR_GUR_LE
-#define CONFIG_SYS_FSL_CCSR_SCFG_LE
-#define CONFIG_SYS_FSL_ESDHC_LE
-#define CONFIG_SYS_FSL_IFC_LE
-#define CONFIG_SYS_FSL_PEX_LUT_LE
-
-#define CONFIG_SYS_MEMAC_LITTLE_ENDIAN
-
 /* Generic Interrupt Controller Definitions */
 #define GICD_BASE                      0x06000000
 #define GICR_BASE                      0x06100000
@@ -55,20 +47,6 @@
 /* SMMU Defintions */
 #define SMMU_BASE                      0x05000000 /* GR0 Base */
 
-/* SFP */
-#define CONFIG_SYS_FSL_SFP_VER_3_4
-#define CONFIG_SYS_FSL_SFP_LE
-#define CONFIG_SYS_FSL_SRK_LE
-
-/* Security Monitor */
-#define CONFIG_SYS_FSL_SEC_MON_LE
-
-/* Secure Boot */
-#define CONFIG_ESBC_HDR_LS
-
-/* DCFG - GUR */
-#define CONFIG_SYS_FSL_CCSR_GUR_LE
-
 /* Cache Coherent Interconnect */
 #define CCI_MN_BASE                    0x04000000
 #define CCI_MN_RNF_NODEID_LIST         0x180
@@ -152,27 +130,7 @@
 #define CONFIG_SYS_DDR_BLOCK1_SIZE     ((phys_size_t)2 << 30)
 #define CONFIG_MAX_MEM_MAPPED          CONFIG_SYS_DDR_BLOCK1_SIZE
 
-#define CONFIG_SYS_FSL_CCSR_GUR_LE
-#define CONFIG_SYS_FSL_CCSR_SCFG_LE
-#define CONFIG_SYS_FSL_ESDHC_LE
-#define CONFIG_SYS_FSL_IFC_LE
-#define CONFIG_SYS_FSL_PEX_LUT_LE
-
-#define CONFIG_SYS_MEMAC_LITTLE_ENDIAN
-
-/* SFP */
-#define CONFIG_SYS_FSL_SFP_VER_3_4
-#define CONFIG_SYS_FSL_SFP_LE
-#define CONFIG_SYS_FSL_SRK_LE
-
-/* Security Monitor */
-#define CONFIG_SYS_FSL_SEC_MON_LE
-
-/* Secure Boot */
-#define CONFIG_ESBC_HDR_LS
-
 /* DCFG - GUR */
-#define CONFIG_SYS_FSL_CCSR_GUR_LE
 #define CONFIG_SYS_FSL_MAX_NUM_OF_SEC  1
 #define CONFIG_SYS_FSL_OCRAM_BASE      0x18000000 /* initial RAM */
 #define SYS_FSL_OCRAM_SPACE_SIZE       0x00200000 /* 2M space */
@@ -187,7 +145,6 @@
 #define L1_CACHE_SHIFT         6
 #define L1_CACHE_BYTES         BIT(L1_CACHE_SHIFT)
 #endif
-#define CONFIG_SYS_FSL_CORES_PER_CLUSTER       2
 #define CONFIG_SYS_FSL_CLUSTER_CLOCKS          { 1, 1, 1, 1, 4, 4, 4, 4 }
 #define CONFIG_SYS_FSL_NUM_CC_PLLS             4
 
@@ -201,13 +158,6 @@
 #define CONFIG_SYS_DDR_BLOCK1_SIZE             ((phys_size_t)2 << 30)
 #define CONFIG_MAX_MEM_MAPPED                  CONFIG_SYS_DDR_BLOCK1_SIZE
 
-#define CONFIG_SYS_FSL_CCSR_GUR_LE
-#define CONFIG_SYS_FSL_CCSR_SCFG_LE
-#define CONFIG_SYS_FSL_ESDHC_LE
-#define CONFIG_SYS_FSL_PEX_LUT_LE
-
-#define CONFIG_SYS_MEMAC_LITTLE_ENDIAN
-
 /* Generic Interrupt Controller Definitions */
 #define GICD_BASE                              0x06000000
 #define GICR_BASE                              0x06200000
@@ -215,26 +165,13 @@
 /* SMMU Definitions */
 #define SMMU_BASE                              0x05000000 /* GR0 Base */
 
-/* SFP */
-#define CONFIG_SYS_FSL_SFP_VER_3_4
-#define CONFIG_SYS_FSL_SFP_LE
-#define CONFIG_SYS_FSL_SRK_LE
-
-/* Security Monitor */
-#define CONFIG_SYS_FSL_SEC_MON_LE
-
-/* Secure Boot */
-#define CONFIG_ESBC_HDR_LS
-
 /* DCFG - GUR */
-#define CONFIG_SYS_FSL_CCSR_GUR_LE
 
 #define CONFIG_SYS_FSL_MAX_NUM_OF_SEC          1
 
 #elif defined(CONFIG_ARCH_LS1028A)
 #define CONFIG_SYS_FSL_NUM_CC_PLLS             3
 #define CONFIG_SYS_FSL_CLUSTER_CLOCKS          { 1, 1 }
-#define CONFIG_FSL_TZPC_BP147
 #define CONFIG_FSL_TZASC_400
 
 /* TZ Protection Controller Definitions */
@@ -268,29 +205,10 @@
 #define CONFIG_SYS_DDR_BLOCK1_SIZE     ((phys_size_t)2 << 30)
 #define CONFIG_MAX_MEM_MAPPED          CONFIG_SYS_DDR_BLOCK1_SIZE
 
-#define CONFIG_SYS_FSL_CCSR_GUR_LE
-#define CONFIG_SYS_FSL_CCSR_SCFG_LE
-#define CONFIG_SYS_FSL_ESDHC_LE
-#define CONFIG_SYS_FSL_PEX_LUT_LE
-
-#define CONFIG_SYS_MEMAC_LITTLE_ENDIAN
-
-/* SFP */
-#define CONFIG_SYS_FSL_SFP_VER_3_4
-#define CONFIG_SYS_FSL_SFP_LE
-#define CONFIG_SYS_FSL_SRK_LE
-
 /* SEC */
 #define CONFIG_SYS_FSL_MAX_NUM_OF_SEC          1
 
-/* Security Monitor */
-#define CONFIG_SYS_FSL_SEC_MON_LE
-
-/* Secure Boot */
-#define CONFIG_ESBC_HDR_LS
-
 /* DCFG - GUR */
-#define CONFIG_SYS_FSL_CCSR_GUR_LE
 
 #elif defined(CONFIG_FSL_LSCH2)
 #define CONFIG_SYS_FSL_OCRAM_BASE              0x10000000 /* initial RAM */
@@ -300,16 +218,11 @@
 #define DCSR_DCFG_SBEESR2                      0x20140534
 #define DCSR_DCFG_MBEESR2                      0x20140544
 
-#define CONFIG_SYS_FSL_CCSR_SCFG_BE
-#define CONFIG_SYS_FSL_ESDHC_BE
 #define CONFIG_SYS_FSL_WDOG_BE
 #define CONFIG_SYS_FSL_DSPI_BE
-#define CONFIG_SYS_FSL_CCSR_GUR_BE
-#define CONFIG_SYS_FSL_PEX_LUT_BE
 
 /* SoC related */
 #ifdef CONFIG_ARCH_LS1043A
-#define CONFIG_SYS_FMAN_V3
 #define CONFIG_SYS_FSL_QMAN_V3
 #define CONFIG_SYS_NUM_FMAN                    1
 #define CONFIG_SYS_NUM_FM1_DTSEC               7
@@ -321,13 +234,6 @@
 #define MAX_QE_RISC            1
 #define QE_NUM_OF_SNUM         28
 
-#define CONFIG_SYS_FSL_IFC_BE
-#define CONFIG_SYS_FSL_SFP_VER_3_2
-#define CONFIG_SYS_FSL_SEC_MON_BE
-#define CONFIG_SYS_FSL_SFP_BE
-#define CONFIG_SYS_FSL_SRK_LE
-#define CONFIG_KEY_REVOCATION
-
 /* SMMU Defintions */
 #define SMMU_BASE              0x09000000
 
@@ -362,17 +268,11 @@
 #elif defined(CONFIG_ARCH_LS1012A)
 #define GICD_BASE              0x01401000
 #define GICC_BASE              0x01402000
-#define CONFIG_SYS_FSL_SFP_VER_3_2
-#define CONFIG_SYS_FSL_SEC_MON_BE
-#define CONFIG_SYS_FSL_SFP_BE
-#define CONFIG_SYS_FSL_SRK_LE
-#define CONFIG_KEY_REVOCATION
 #define CONFIG_SYS_FSL_MAX_NUM_OF_SEC           1
 #define CONFIG_SYS_DDR_BLOCK1_SIZE     ((phys_size_t)2 << 30)
 #define CONFIG_MAX_MEM_MAPPED          CONFIG_SYS_DDR_BLOCK1_SIZE
 
 #elif defined(CONFIG_ARCH_LS1046A)
-#define CONFIG_SYS_FMAN_V3
 #define CONFIG_SYS_FSL_QMAN_V3
 #define CONFIG_SYS_NUM_FMAN                    1
 #define CONFIG_SYS_NUM_FM1_DTSEC               8
@@ -380,13 +280,6 @@
 #define CONFIG_SYS_DDR_BLOCK1_SIZE  ((phys_size_t)2 << 30)
 #define CONFIG_MAX_MEM_MAPPED           CONFIG_SYS_DDR_BLOCK1_SIZE
 
-#define CONFIG_SYS_FSL_IFC_BE
-#define CONFIG_SYS_FSL_SFP_VER_3_2
-#define CONFIG_SYS_FSL_SEC_MON_BE
-#define CONFIG_SYS_FSL_SFP_BE
-#define CONFIG_SYS_FSL_SRK_LE
-#define CONFIG_KEY_REVOCATION
-
 /* SMMU Defintions */
 #define SMMU_BASE              0x09000000