Merge branch 'master' of git://git.denx.de/u-boot

[platform/kernel/u-boot.git] / arch / arm / include / asm / arch-bcm2835 / mbox.h

diff --git a/arch/arm/include/asm/arch-bcm2835/mbox.h b/arch/arm/include/asm/arch-bcm2835/mbox.h
index b07c4a0..04bf480 100644 (file)
--- a/arch/arm/include/asm/arch-bcm2835/mbox.h
+++ b/arch/arm/include/asm/arch-bcm2835/mbox.h
@@ -1,18 +1,7 @@
 /*
- * (C) Copyright 2012 Stephen Warren
+ * (C) Copyright 2012,2015 Stephen Warren
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #ifndef _BCM2835_MBOX_H
@@ -49,7 +38,11 @@
 
 /* Raw mailbox HW */
 
+#ifdef CONFIG_BCM2836
+#define BCM2835_MBOX_PHYSADDR  0x3f00b880
+#else
 #define BCM2835_MBOX_PHYSADDR  0x2000b880
+#endif
 
 struct bcm2835_mbox_regs {
        u32 read;
@@ -130,6 +123,58 @@ struct bcm2835_mbox_tag_hdr {
  * };
  */
 
+#define BCM2835_MBOX_TAG_GET_BOARD_REV 0x00010002
+
+#ifdef CONFIG_BCM2836
+#define BCM2836_BOARD_REV_2_B          0x4
+#else
+/*
+ * 0x2..0xf from:
+ * http://raspberryalphaomega.org.uk/2013/02/06/automatic-raspberry-pi-board-revision-detection-model-a-b1-and-b2/
+ * http://www.raspberrypi.org/forums/viewtopic.php?f=63&t=32733
+ * 0x10, 0x11 from swarren's testing
+ */
+#define BCM2835_BOARD_REV_B_I2C0_2     0x2
+#define BCM2835_BOARD_REV_B_I2C0_3     0x3
+#define BCM2835_BOARD_REV_B_I2C1_4     0x4
+#define BCM2835_BOARD_REV_B_I2C1_5     0x5
+#define BCM2835_BOARD_REV_B_I2C1_6     0x6
+#define BCM2835_BOARD_REV_A_7          0x7
+#define BCM2835_BOARD_REV_A_8          0x8
+#define BCM2835_BOARD_REV_A_9          0x9
+#define BCM2835_BOARD_REV_B_REV2_d     0xd
+#define BCM2835_BOARD_REV_B_REV2_e     0xe
+#define BCM2835_BOARD_REV_B_REV2_f     0xf
+#define BCM2835_BOARD_REV_B_PLUS       0x10
+#define BCM2835_BOARD_REV_CM           0x11
+#define BCM2835_BOARD_REV_A_PLUS       0x12
+#endif
+
+struct bcm2835_mbox_tag_get_board_rev {
+       struct bcm2835_mbox_tag_hdr tag_hdr;
+       union {
+               struct {
+               } req;
+               struct {
+                       u32 rev;
+               } resp;
+       } body;
+};
+
+#define BCM2835_MBOX_TAG_GET_MAC_ADDRESS       0x00010003
+
+struct bcm2835_mbox_tag_get_mac_address {
+       struct bcm2835_mbox_tag_hdr tag_hdr;
+       union {
+               struct {
+               } req;
+               struct {
+                       u8 mac[6];
+                       u8 pad[2];
+               } resp;
+       } body;
+};
+
 #define BCM2835_MBOX_TAG_GET_ARM_MEMORY                0x00010005
 
 struct bcm2835_mbox_tag_get_arm_mem {
@@ -144,6 +189,54 @@ struct bcm2835_mbox_tag_get_arm_mem {
        } body;
 };
 
+#define BCM2835_MBOX_POWER_DEVID_SDHCI         0
+#define BCM2835_MBOX_POWER_DEVID_UART0         1
+#define BCM2835_MBOX_POWER_DEVID_UART1         2
+#define BCM2835_MBOX_POWER_DEVID_USB_HCD       3
+#define BCM2835_MBOX_POWER_DEVID_I2C0          4
+#define BCM2835_MBOX_POWER_DEVID_I2C1          5
+#define BCM2835_MBOX_POWER_DEVID_I2C2          6
+#define BCM2835_MBOX_POWER_DEVID_SPI           7
+#define BCM2835_MBOX_POWER_DEVID_CCP2TX                8
+
+#define BCM2835_MBOX_POWER_STATE_RESP_ON       (1 << 0)
+/* Device doesn't exist */
+#define BCM2835_MBOX_POWER_STATE_RESP_NODEV    (1 << 1)
+
+#define BCM2835_MBOX_TAG_GET_POWER_STATE       0x00020001
+
+struct bcm2835_mbox_tag_get_power_state {
+       struct bcm2835_mbox_tag_hdr tag_hdr;
+       union {
+               struct {
+                       u32 device_id;
+               } req;
+               struct {
+                       u32 device_id;
+                       u32 state;
+               } resp;
+       } body;
+};
+
+#define BCM2835_MBOX_TAG_SET_POWER_STATE       0x00028001
+
+#define BCM2835_MBOX_SET_POWER_STATE_REQ_ON    (1 << 0)
+#define BCM2835_MBOX_SET_POWER_STATE_REQ_WAIT  (1 << 1)
+
+struct bcm2835_mbox_tag_set_power_state {
+       struct bcm2835_mbox_tag_hdr tag_hdr;
+       union {
+               struct {
+                       u32 device_id;
+                       u32 state;
+               } req;
+               struct {
+                       u32 device_id;
+                       u32 state;
+               } resp;
+       } body;
+};
+
 #define BCM2835_MBOX_TAG_GET_CLOCK_RATE        0x00030002
 
 #define BCM2835_MBOX_CLOCK_ID_EMMC     1
@@ -361,6 +454,7 @@ struct bcm2835_mbox_tag_overscan {
                        u32 top;
                        u32 bottom;
                        u32 left;
+                       u32 right;
                } resp;
        } body;
 };