#define PRM_PER_USBPHYOCP2SCP0_CLKCTRL (CM_PER + 0x5b8)
#define PRM_PER_USBPHYOCP2SCP1_CLKCTRL (CM_PER + 0x5c0)
#define USBPHYOCPSCP_MODULE_EN (1 << 1)
+#define CM_DEVICE_INST 0x44df4100
+
+/* Control status register */
+#define CTRL_CRYSTAL_FREQ_SRC_MASK (1 << 31)
+#define CTRL_CRYSTAL_FREQ_SRC_SHIFT 31
+#define CTRL_CRYSTAL_FREQ_SELECTION_MASK (0x3 << 29)
+#define CTRL_CRYSTAL_FREQ_SELECTION_SHIFT 29
+#define CTRL_SYSBOOT_15_14_MASK (0x3 << 22)
+#define CTRL_SYSBOOT_15_14_SHIFT 22
+
+#define CTRL_CRYSTAL_FREQ_SRC_SYSBOOT 0x0
+#define CTRL_CRYSTAL_FREQ_SRC_EFUSE 0x1
+
+#define NUM_CRYSTAL_FREQ 0x4
#endif /* __AM43XX_HARDWARE_AM43XX_H */