Merge tag 'u-boot-rockchip-20200501' of https://gitlab.denx.de/u-boot/custodians...

[platform/kernel/u-boot.git] / arch / arm / dts / zynqmp-zcu104-revC.dts

diff --git a/arch/arm/dts/zynqmp-zcu104-revC.dts b/arch/arm/dts/zynqmp-zcu104-revC.dts
index 4044eea..d4b3769 100644 (file)
--- a/arch/arm/dts/zynqmp-zcu104-revC.dts
+++ b/arch/arm/dts/zynqmp-zcu104-revC.dts
@@ -2,7 +2,7 @@
 /*
  * dts file for Xilinx ZynqMP ZCU104
  *
- * (C) Copyright 2017 - 2018, Xilinx, Inc.
+ * (C) Copyright 2017 - 2020, Xilinx, Inc.
  *
  * Michal Simek <michal.simek@xilinx.com>
  */
@@ -56,6 +56,38 @@
        status = "okay";
 };
 
+&fpd_dma_chan1 {
+       status = "okay";
+};
+
+&fpd_dma_chan2 {
+       status = "okay";
+};
+
+&fpd_dma_chan3 {
+       status = "okay";
+};
+
+&fpd_dma_chan4 {
+       status = "okay";
+};
+
+&fpd_dma_chan5 {
+       status = "okay";
+};
+
+&fpd_dma_chan6 {
+       status = "okay";
+};
+
+&fpd_dma_chan7 {
+       status = "okay";
+};
+
+&fpd_dma_chan8 {
+       status = "okay";
+};
+
 &gem3 {
        status = "okay";
        phy-handle = <&phy0>;
@@ -65,6 +97,7 @@
                ti,rx-internal-delay = <0x8>;
                ti,tx-internal-delay = <0xa>;
                ti,fifo-depth = <0x1>;
+               ti,dp83867-rxctrl-strap-quirk;
        };
 };
 
@@ -139,15 +172,13 @@
                        #address-cells = <1>;
                        #size-cells = <0>;
                        reg = <2>;
-                       irps5401_43: irps54012@43 { /* IRPS5401 - u175 */
-                               #clock-cells = <0>;
+                       irps5401_43: irps5401@43 { /* IRPS5401 - u175 */
                                compatible = "infineon,irps5401";
-                               reg = <0x43>;
+                               reg = <0x43>; /* pmbus / i2c 0x13 */
                        };
-                       irps5401_4d: irps54012@4d { /* IRPS5401 - u180 */
-                               #clock-cells = <0>;
+                       irps5401_44: irps5401@44 { /* IRPS5401 - u180 */
                                compatible = "infineon,irps5401";
-                               reg = <0x4d>;
+                               reg = <0x44>; /* pmbus / i2c 0x14 */
                        };
                };
 
@@ -189,19 +220,19 @@
                spi-tx-bus-width = <1>;
                spi-rx-bus-width = <4>;
                spi-max-frequency = <108000000>; /* Based on DC1 spec */
-               partition@qspi-fsbl-uboot { /* for testing purpose */
+               partition@0 { /* for testing purpose */
                        label = "qspi-fsbl-uboot";
                        reg = <0x0 0x100000>;
                };
-               partition@qspi-linux { /* for testing purpose */
+               partition@100000 { /* for testing purpose */
                        label = "qspi-linux";
                        reg = <0x100000 0x500000>;
                };
-               partition@qspi-device-tree { /* for testing purpose */
+               partition@600000 { /* for testing purpose */
                        label = "qspi-device-tree";
                        reg = <0x600000 0x20000>;
                };
-               partition@qspi-rootfs { /* for testing purpose */
+               partition@620000 { /* for testing purpose */
                        label = "qspi-rootfs";
                        reg = <0x620000 0x5E0000>;
                };