Merge git://git.denx.de/u-boot-socfpga

[platform/kernel/u-boot.git] / arch / arm / dts / uniphier-ld20.dtsi

diff --git a/arch/arm/dts/uniphier-ld20.dtsi b/arch/arm/dts/uniphier-ld20.dtsi
index d853526..927340f 100644 (file)
--- a/arch/arm/dts/uniphier-ld20.dtsi
+++ b/arch/arm/dts/uniphier-ld20.dtsi
@@ -4,10 +4,10 @@
  * Copyright (C) 2015-2016 Socionext Inc.
  *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
  *
- * SPDX-License-Identifier:    GPL-2.0+        X11
+ * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  */
 
-/memreserve/ 0x80000000 0x00080000;
+/memreserve/ 0x80000000 0x02000000;
 
 / {
        compatible = "socionext,uniphier-ld20";
@@ -80,35 +80,35 @@
                compatible = "operating-points-v2";
                opp-shared;
 
-               opp@250000000 {
+               opp-250000000 {
                        opp-hz = /bits/ 64 <250000000>;
                        clock-latency-ns = <300>;
                };
-               opp@275000000 {
+               opp-275000000 {
                        opp-hz = /bits/ 64 <275000000>;
                        clock-latency-ns = <300>;
                };
-               opp@500000000 {
+               opp-500000000 {
                        opp-hz = /bits/ 64 <500000000>;
                        clock-latency-ns = <300>;
                };
-               opp@550000000 {
+               opp-550000000 {
                        opp-hz = /bits/ 64 <550000000>;
                        clock-latency-ns = <300>;
                };
-               opp@666667000 {
+               opp-666667000 {
                        opp-hz = /bits/ 64 <666667000>;
                        clock-latency-ns = <300>;
                };
-               opp@733334000 {
+               opp-733334000 {
                        opp-hz = /bits/ 64 <733334000>;
                        clock-latency-ns = <300>;
                };
-               opp@1000000000 {
+               opp-1000000000 {
                        opp-hz = /bits/ 64 <1000000000>;
                        clock-latency-ns = <300>;
                };
-               opp@1100000000 {
+               opp-1100000000 {
                        opp-hz = /bits/ 64 <1100000000>;
                        clock-latency-ns = <300>;
                };
@@ -118,35 +118,35 @@
                compatible = "operating-points-v2";
                opp-shared;
 
-               opp@250000000 {
+               opp-250000000 {
                        opp-hz = /bits/ 64 <250000000>;
                        clock-latency-ns = <300>;
                };
-               opp@275000000 {
+               opp-275000000 {
                        opp-hz = /bits/ 64 <275000000>;
                        clock-latency-ns = <300>;
                };
-               opp@500000000 {
+               opp-500000000 {
                        opp-hz = /bits/ 64 <500000000>;
                        clock-latency-ns = <300>;
                };
-               opp@550000000 {
+               opp-550000000 {
                        opp-hz = /bits/ 64 <550000000>;
                        clock-latency-ns = <300>;
                };
-               opp@666667000 {
+               opp-666667000 {
                        opp-hz = /bits/ 64 <666667000>;
                        clock-latency-ns = <300>;
                };
-               opp@733334000 {
+               opp-733334000 {
                        opp-hz = /bits/ 64 <733334000>;
                        clock-latency-ns = <300>;
                };
-               opp@1000000000 {
+               opp-1000000000 {
                        opp-hz = /bits/ 64 <1000000000>;
                        clock-latency-ns = <300>;
                };
-               opp@1100000000 {
+               opp-1100000000 {
                        opp-hz = /bits/ 64 <1100000000>;
                        clock-latency-ns = <300>;
                };
@@ -178,7 +178,6 @@
                #address-cells = <1>;
                #size-cells = <1>;
                ranges = <0 0 0 0xffffffff>;
-               u-boot,dm-pre-reloc;
 
                serial0: serial@54006800 {
                        compatible = "socionext,uniphier-uart";
@@ -306,7 +305,7 @@
                        pinctrl-0 = <&pinctrl_system_bus>;
                };
 
-               smpctrl@59800000 {
+               smpctrl@59801000 {
                        compatible = "socionext,uniphier-smpctrl";
                        reg = <0x59801000 0x400>;
                };
@@ -353,6 +352,11 @@
                        bus-width = <8>;
                        mmc-ddr-1_8v;
                        mmc-hs200-1_8v;
+                       cdns,phy-input-delay-legacy = <4>;
+                       cdns,phy-input-delay-mmc-highspeed = <2>;
+                       cdns,phy-input-delay-mmc-ddr = <3>;
+                       cdns,phy-dll-delay-sdclk = <21>;
+                       cdns,phy-dll-delay-sdclk-hsmmc = <21>;
                };
 
                sd: sdhc@5a400000 {
@@ -373,11 +377,9 @@
                        compatible = "socionext,uniphier-ld20-soc-glue",
                                     "simple-mfd", "syscon";
                        reg = <0x5f800000 0x2000>;
-                       u-boot,dm-pre-reloc;
 
                        pinctrl: pinctrl {
                                compatible = "socionext,uniphier-ld20-pinctrl";
-                               u-boot,dm-pre-reloc;
                        };
                };
 
@@ -429,7 +431,7 @@
                };
 
                nand: nand@68000000 {
-                       compatible = "socionext,denali-nand-v5b";
+                       compatible = "socionext,uniphier-denali-nand-v5b";
                        status = "disabled";
                        reg-names = "nand_data", "denali_reg";
                        reg = <0x68000000 0x20>, <0x68100000 0x1000>;