Merge tag 'u-boot-amlogic-20181207' of git://git.denx.de/u-boot-amlogic

[platform/kernel/u-boot.git] / arch / arm / dts / ulcb.dtsi

diff --git a/arch/arm/dts/ulcb.dtsi b/arch/arm/dts/ulcb.dtsi
index 59fcf71..0ead552 100644 (file)
--- a/arch/arm/dts/ulcb.dtsi
+++ b/arch/arm/dts/ulcb.dtsi
@@ -1,12 +1,9 @@
+// SPDX-License-Identifier: GPL-2.0
 /*
  * Device Tree Source for the R-Car Gen3 ULCB board
  *
  * Copyright (C) 2016 Renesas Electronics Corp.
  * Copyright (C) 2016 Cogent Embedded, Inc.
- *
- * This file is licensed under the terms of the GNU General Public License
- * version 2.  This program is licensed "as is" without any warranty of any
- * kind, whether express or implied.
  */
 
 #include <dt-bindings/gpio/gpio.h>
@@ -24,15 +21,6 @@
                stdout-path = "serial0:115200n8";
        };
 
-       cpld {
-               compatible = "renesas,ulcb-cpld";
-               status = "okay";
-               gpio-sck = <&gpio6 8 0>;
-               gpio-mosi = <&gpio6 7 0>;
-               gpio-miso = <&gpio6 10 0>;
-               gpio-sstbz = <&gpio2 3 0>;
-       };
-
        audio_clkout: audio-clkout {
                /*
                 * This is same as <&rcar_sound 0>
@@ -40,7 +28,17 @@
                 */
                compatible = "fixed-clock";
                #clock-cells = <0>;
-               clock-frequency = <11289600>;
+               clock-frequency = <12288000>;
+       };
+
+       hdmi0-out {
+               compatible = "hdmi-connector";
+               type = "a";
+
+               port {
+                       hdmi0_con: endpoint {
+                       };
+               };
        };
 
        keyboard {
@@ -129,6 +127,12 @@
                #clock-cells = <0>;
                clock-frequency = <24576000>;
        };
+
+       x23_clk: x23-clock {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <25000000>;
+       };
 };
 
 &audio_clk_a {
@@ -138,9 +142,8 @@
 &avb {
        pinctrl-0 = <&avb_pins>;
        pinctrl-names = "default";
-       renesas,no-ether-link;
        phy-handle = <&phy0>;
-       reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
+       phy-mode = "rgmii-txid";
        status = "okay";
 
        phy0: ethernet-phy@0 {
@@ -148,9 +151,14 @@
                reg = <0>;
                interrupt-parent = <&gpio2>;
                interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
+               reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
        };
 };
 
+&du {
+       status = "okay";
+};
+
 &ehci1 {
        status = "okay";
 };
@@ -163,6 +171,23 @@
        clock-frequency = <32768>;
 };
 
+&hdmi0 {
+       status = "okay";
+
+       ports {
+               port@1 {
+                       reg = <1>;
+                       rcar_dw_hdmi0_out: endpoint {
+                               remote-endpoint = <&hdmi0_con>;
+                       };
+               };
+       };
+};
+
+&hdmi0_con {
+       remote-endpoint = <&rcar_dw_hdmi0_out>;
+};
+
 &i2c2 {
        pinctrl-0 = <&i2c2_pins>;
        pinctrl-names = "default";
@@ -199,8 +224,48 @@
        };
 };
 
+&i2c4 {
+       status = "okay";
+
+       clock-frequency = <400000>;
+
+       versaclock5: clock-generator@6a {
+               compatible = "idt,5p49v5925";
+               reg = <0x6a>;
+               #clock-cells = <1>;
+               clocks = <&x23_clk>;
+               clock-names = "xin";
+       };
+};
+
 &i2c_dvfs {
        status = "okay";
+
+       pmic: pmic@30 {
+               pinctrl-0 = <&irq0_pins>;
+               pinctrl-names = "default";
+
+               compatible = "rohm,bd9571mwv";
+               reg = <0x30>;
+               interrupt-parent = <&intc_ex>;
+               interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+               interrupt-controller;
+               #interrupt-cells = <2>;
+               gpio-controller;
+               #gpio-cells = <2>;
+               rohm,ddr-backup-power = <0xf>;
+               rohm,rstbmode-pulse;
+
+               regulators {
+                       dvfs: dvfs {
+                               regulator-name = "dvfs";
+                               regulator-min-microvolt = <750000>;
+                               regulator-max-microvolt = <1030000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+               };
+       };
 };
 
 &ohci1 {
@@ -213,13 +278,12 @@
 
        avb_pins: avb {
                mux {
-                       groups = "avb_link", "avb_phy_int", "avb_mdc",
-                                "avb_mii";
+                       groups = "avb_link", "avb_mdio", "avb_mii";
                        function = "avb";
                };
 
-               pins_mdc {
-                       groups = "avb_mdc";
+               pins_mdio {
+                       groups = "avb_mdio";
                        drive-strength = <24>;
                };
 
@@ -235,6 +299,11 @@
                function = "i2c2";
        };
 
+       irq0_pins: irq0 {
+               groups = "intc_ex_irq0";
+               function = "intc_ex";
+       };
+
        scif2_pins: scif2 {
                groups = "scif2_data_a";
                function = "scif2";
@@ -258,13 +327,13 @@
        };
 
        sdhi2_pins: sd2 {
-               groups = "sdhi2_data8", "sdhi2_ctrl";
+               groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds";
                function = "sdhi2";
-               power-source = <1800>;
+               power-source = <3300>;
        };
 
        sdhi2_pins_uhs: sd2_uhs {
-               groups = "sdhi2_data8", "sdhi2_ctrl";
+               groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds";
                function = "sdhi2";
                power-source = <1800>;
        };
@@ -375,7 +444,7 @@
        status = "okay";
 };
 
-&wdt0 {
+&rwdt {
        timeout-sec = <60>;
        status = "okay";
 };