Merge branch 'master' of git://git.denx.de/u-boot-samsung

[platform/kernel/u-boot.git] / arch / arm / dts / stm32f746.dtsi

diff --git a/arch/arm/dts/stm32f746.dtsi b/arch/arm/dts/stm32f746.dtsi
index f59eca8..54f5bc7 100644 (file)
--- a/arch/arm/dts/stm32f746.dtsi
+++ b/arch/arm/dts/stm32f746.dtsi
@@ -1,5 +1,6 @@
 /*
  * Copyright 2016 - Michael Kurz <michi.kurz@gmail.com>
+ * Copyright 2016 - Vikas MANOCHA <vikas.manocha@st.com>
  *
  * Based on:
  * stm32f429.dtsi from Linux
@@ -70,6 +71,13 @@
                        status = "disabled";
                };
 
+               fmc: fmc@A0000000 {
+                       compatible = "st,stm32-fmc";
+                       reg = <0xA0000000 0x1000>;
+                       clocks = <&rcc 0 64>;
+                       u-boot,dm-pre-reloc;
+               };
+
                qspi: quadspi@A0001000 {
                        compatible = "st,stm32-qspi";
                        #address-cells = <1>;
@@ -78,10 +86,11 @@
                        reg-names = "QuadSPI", "QuadSPI-memory";
                        interrupts = <92>;
                        spi-max-frequency = <108000000>;
+                       clocks = <&rcc 0 65>;
                        status = "disabled";
                };
                usart1: serial@40011000 {
-                       compatible = "st,stm32-usart", "st,stm32-uart";
+                       compatible = "st,stm32f7-usart", "st,stm32f7-uart";
                        reg = <0x40011000 0x400>;
                        interrupts = <37>;
                        clocks = <&rcc 0 164>;
@@ -104,6 +113,118 @@
                        ranges = <0 0x40020000 0x3000>;
                        u-boot,dm-pre-reloc;
                        pins-are-numbered;
+
+                       gpioa: gpio@40020000 {
+                               gpio-controller;
+                               #gpio-cells = <2>;
+                               compatible = "st,stm32-gpio";
+                               reg = <0x0 0x400>;
+                               clocks = <&rcc 0 0>;
+                               st,bank-name = "GPIOA";
+                               u-boot,dm-pre-reloc;
+                       };
+
+                       gpiob: gpio@40020400 {
+                               gpio-controller;
+                               #gpio-cells = <2>;
+                               compatible = "st,stm32-gpio";
+                               reg = <0x400 0x400>;
+                               clocks = <&rcc 0 1>;
+                               st,bank-name = "GPIOB";
+                               u-boot,dm-pre-reloc;
+                       };
+
+
+                       gpioc: gpio@40020800 {
+                               gpio-controller;
+                               #gpio-cells = <2>;
+                               compatible = "st,stm32-gpio";
+                               reg = <0x800 0x400>;
+                               clocks = <&rcc 0 2>;
+                               st,bank-name = "GPIOC";
+                               u-boot,dm-pre-reloc;
+                       };
+
+                       gpiod: gpio@40020c00 {
+                               gpio-controller;
+                               #gpio-cells = <2>;
+                               compatible = "st,stm32-gpio";
+                               reg = <0xc00 0x400>;
+                               clocks = <&rcc 0 3>;
+                               st,bank-name = "GPIOD";
+                               u-boot,dm-pre-reloc;
+                       };
+
+                       gpioe: gpio@40021000 {
+                               gpio-controller;
+                               #gpio-cells = <2>;
+                               compatible = "st,stm32-gpio";
+                               reg = <0x1000 0x400>;
+                               clocks = <&rcc 0 4>;
+                               st,bank-name = "GPIOE";
+                               u-boot,dm-pre-reloc;
+                       };
+
+                       gpiof: gpio@40021400 {
+                               gpio-controller;
+                               #gpio-cells = <2>;
+                               compatible = "st,stm32-gpio";
+                               reg = <0x1400 0x400>;
+                               clocks = <&rcc 0 5>;
+                               st,bank-name = "GPIOF";
+                               u-boot,dm-pre-reloc;
+                       };
+
+                       gpiog: gpio@40021800 {
+                               gpio-controller;
+                               #gpio-cells = <2>;
+                               compatible = "st,stm32-gpio";
+                               reg = <0x1800 0x400>;
+                               clocks = <&rcc 0 6>;
+                               st,bank-name = "GPIOG";
+                               u-boot,dm-pre-reloc;
+                       };
+
+                       gpioh: gpio@40021c00 {
+                               gpio-controller;
+                               #gpio-cells = <2>;
+                               compatible = "st,stm32-gpio";
+                               reg = <0x1c00 0x400>;
+                               clocks = <&rcc 0 7>;
+                               st,bank-name = "GPIOH";
+                               u-boot,dm-pre-reloc;
+                       };
+
+                       gpioi: gpio@40022000 {
+                               gpio-controller;
+                               #gpio-cells = <2>;
+                               compatible = "st,stm32-gpio";
+                               reg = <0x2000 0x400>;
+                               clocks = <&rcc 0 8>;
+                               st,bank-name = "GPIOI";
+                               u-boot,dm-pre-reloc;
+                       };
+
+                       gpioj: gpio@40022400 {
+                               gpio-controller;
+                               #gpio-cells = <2>;
+                               compatible = "st,stm32-gpio";
+                               reg = <0x2400 0x400>;
+                               clocks = <&rcc 0 9>;
+                               st,bank-name = "GPIOJ";
+                               u-boot,dm-pre-reloc;
+                       };
+
+                       gpiok: gpio@40022800 {
+                               gpio-controller;
+                               #gpio-cells = <2>;
+                               compatible = "st,stm32-gpio";
+                               reg = <0x2800 0x400>;
+                               clocks = <&rcc 0 10>;
+                               st,bank-name = "GPIOK";
+                               u-boot,dm-pre-reloc;
+                       };
+
                };
        };
 };