Merge tag 'u-boot-rockchip-20200501' of https://gitlab.denx.de/u-boot/custodians...
[platform/kernel/u-boot.git] / arch / arm / dts / rk3399-orangepi.dts
index cf37b96..f9f7246 100644 (file)
                vin-supply = <&vcc_sys>;
        };
 
-       vcc5v0_typec0: vcc5v0-typec0-regulator {
+       vbus_typec: vbus-typec-regulator {
                compatible = "regulator-fixed";
                enable-active-high;
                gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>;
                pinctrl-names = "default";
-               pinctrl-0 = <&vcc5v0_typec0_en>;
-               regulator-name = "vcc5v0_typec0";
+               pinctrl-0 = <&vcc5v0_typec_en>;
+               regulator-name = "vbus_typec";
                vin-supply = <&vcc_sys>;
        };
 
        clock_in_out = "input";
        phy-supply = <&vcc3v3_s3>;
        phy-mode = "rgmii";
+       phy-handle = <&rtl8211e>;
        pinctrl-names = "default";
-       pinctrl-0 = <&rgmii_pins>;
-       snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
-       snps,reset-active-low;
-       snps,reset-delays-us = <0 10000 50000>;
+       pinctrl-0 = <&rgmii_pins>, <&phy_intb>, <&phy_rstb>;
        tx_delay = <0x28>;
        rx_delay = <0x11>;
        status = "okay";
+
+       mdio {
+               compatible = "snps,dwmac-mdio";
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               rtl8211e: phy@1 {
+                       reg = <1>;
+                       interrupt-parent = <&gpio3>;
+                       interrupts = <RK_PB2 IRQ_TYPE_LEVEL_LOW>;
+                       reset-assert-us = <10000>;
+                       reset-deassert-us = <30000>;
+                       reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
+               };
+       };
 };
 
 &gpu {
                compatible = "silergy,syr827";
                reg = <0x40>;
                fcs,suspend-voltage-selector = <1>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&cpu_b_sleep>;
                regulator-name = "vdd_cpu_b";
                regulator-min-microvolt = <712500>;
                regulator-max-microvolt = <1500000>;
                compatible = "silergy,syr828";
                reg = <0x41>;
                fcs,suspend-voltage-selector = <1>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&gpu_sleep>;
                regulator-name = "vdd_gpu";
                regulator-min-microvolt = <712500>;
                regulator-max-microvolt = <1500000>;
                compatible = "asahi-kasei,ak09911";
                reg = <0x0c>;
                vdd-supply = <&vcc3v3_s3>;
+               vid-supply = <&vcc3v3_s3>;
        };
 
        mpu6500@68 {
                pinctrl-0 = <&light_int_l>;
                vdd-supply = <&vcc3v3_s3>;
        };
+
+       fusb302@22 {
+               compatible = "fcs,fusb302";
+               reg = <0x22>;
+               interrupt-parent = <&gpio1>;
+               interrupts = <RK_PA2 IRQ_TYPE_LEVEL_LOW>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&chg_cc_int_l>;
+               vbus-supply = <&vbus_typec>;
+       };
 };
 
 &io_domains {
                };
        };
 
+       phy {
+               phy_intb: phy-intb {
+                       rockchip,pins = <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
+               };
+
+               phy_rstb: phy-rstb {
+                       rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
+               };
+       };
+
        pmic {
+               cpu_b_sleep: cpu-b-sleep {
+                       rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
+               };
+
+               gpu_sleep: gpu-sleep {
+                       rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
+               };
+
                pmic_int_l: pmic-int-l {
                        rockchip,pins =
                                <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
        sd {
                sdmmc0_pwr_h: sdmmc0-pwr-h {
                        rockchip,pins =
-                               <RK_GPIO0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
+                               <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
                };
        };
 
                                <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
                };
 
-               vcc5v0_typec0_en: vcc5v0-typec0-en {
+               vcc5v0_typec_en: vcc5v0-typec-en {
                        rockchip,pins =
                                <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
                };
                        rockchip,pins = <4 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>;
                };
        };
+
+       fusb302 {
+               chg_cc_int_l: chg-cc-int-l {
+                       rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
+               };
+       };
 };
 
 &pwm0 {
        pinctrl-names = "default";
        pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
        sd-uhs-sdr104;
+       #address-cells = <1>;
+       #size-cells = <0>;
        status = "okay";
 
        brcmf: wifi@1 {
+               reg = <1>;
                compatible = "brcm,bcm4329-fmac";
                interrupt-parent = <&gpio0>;
                interrupts = <RK_PA3 GPIO_ACTIVE_HIGH>;
        status = "okay";
 
        u2phy0_otg: otg-port {
-               phy-supply = <&vcc5v0_typec0>;
+               phy-supply = <&vbus_typec>;
                status = "okay";
        };
 
        bluetooth {
                compatible = "brcm,bcm43438-bt";
                clocks = <&rk808 1>;
-               clock-names = "ext_clock";
+               clock-names = "lpo";
                device-wakeup-gpios = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>;
                host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;
                shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>;
                pinctrl-names = "default";
                pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_reg_on_h>;
+               vbat-supply = <&vcc3v3_sys>;
+               vddio-supply = <&vcc_1v8>;
        };
 };