Merge tag 'u-boot-rockchip-20200501' of https://gitlab.denx.de/u-boot/custodians...

[platform/kernel/u-boot.git] / arch / arm / dts / rk3288-firefly.dtsi

diff --git a/arch/arm/dts/rk3288-firefly.dtsi b/arch/arm/dts/rk3288-firefly.dtsi
index 072eaa6..b7f279f 100644 (file)
--- a/arch/arm/dts/rk3288-firefly.dtsi
+++ b/arch/arm/dts/rk3288-firefly.dtsi
@@ -1,7 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
 /*
  * Copyright (c) 2014, 2015 FUKAUMI Naoki <naobsd@gmail.com>
- *
- * SPDX-License-Identifier:     GPL-2.0+ X11
  */
 
 #include "rk3288.dtsi"
@@ -26,8 +25,6 @@
 
        keys: gpio-keys {
                compatible = "gpio-keys";
-               #address-cells = <1>;
-               #size-cells = <0>;
 
                button@0 {
                        gpio-key,wakeup = <1>;
@@ -323,6 +320,11 @@
                output-low;
        };
 
+       pcfg_pull_up_drv_12ma: pcfg-pull-up-drv-12ma {
+               bias-pull-up;
+               drive-strength = <12>;
+       };
+
        act8846 {
                pwr_hold: pwr-hold {
                        rockchip,pins = <0 1 RK_FUNC_GPIO &pcfg_output_high>;
@@ -366,8 +368,27 @@
        };
 
        sdmmc {
+               /*
+                * Default drive strength isn't enough to achieve even
+                * high-speed mode on firefly board so bump up to 12ma.
+                */
+               sdmmc_bus4: sdmmc-bus4 {
+                       rockchip,pins = <6 RK_PC0 1 &pcfg_pull_up_drv_12ma>,
+                                       <6 RK_PC1 1 &pcfg_pull_up_drv_12ma>,
+                                       <6 RK_PC2 1 &pcfg_pull_up_drv_12ma>,
+                                       <6 RK_PC3 1 &pcfg_pull_up_drv_12ma>;
+               };
+
+               sdmmc_clk: sdmmc-clk {
+                       rockchip,pins = <6 RK_PC4 1 &pcfg_pull_none_12ma>;
+               };
+
+               sdmmc_cmd: sdmmc-cmd {
+                       rockchip,pins = <6 RK_PC5 1 &pcfg_pull_up_drv_12ma>;
+               };
+
                sdmmc_pwr: sdmmc-pwr {
-                       rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>;
+                       rockchip,pins = <7 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
                };
        };