Merge https://gitlab.denx.de/u-boot/custodians/u-boot-spi

[platform/kernel/u-boot.git] / arch / arm / dts / r8a7792.dtsi

diff --git a/arch/arm/dts/r8a7792.dtsi b/arch/arm/dts/r8a7792.dtsi
index 6fd80e3..39af16c 100644 (file)
--- a/arch/arm/dts/r8a7792.dtsi
+++ b/arch/arm/dts/r8a7792.dtsi
@@ -22,6 +22,7 @@
                i2c3 = &i2c3;
                i2c4 = &i2c4;
                i2c5 = &i2c5;
+               i2c6 = &iic3;
                spi0 = &qspi;
                spi1 = &msiof0;
                spi2 = &msiof1;
@@ -344,6 +345,9 @@
                icram0: sram@e63a0000 {
                        compatible = "mmio-sram";
                        reg = <0 0xe63a0000 0 0x12000>;
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       ranges = <0 0 0xe63a0000 0x12000>;
                };
 
                icram1: sram@e63c0000 {
@@ -465,22 +469,22 @@
                        compatible = "renesas,dmac-r8a7792",
                                     "renesas,rcar-dmac";
                        reg = <0 0xe6700000 0 0x20000>;
-                       interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
-                                     GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
-                                     GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
-                                     GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
-                                     GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
-                                     GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
-                                     GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
-                                     GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
-                                     GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
-                                     GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
-                                     GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
-                                     GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
-                                     GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
-                                     GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
-                                     GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
-                                     GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
                        interrupt-names = "error",
                                          "ch0", "ch1", "ch2", "ch3",
                                          "ch4", "ch5", "ch6", "ch7",
@@ -498,22 +502,22 @@
                        compatible = "renesas,dmac-r8a7792",
                                     "renesas,rcar-dmac";
                        reg = <0 0xe6720000 0 0x20000>;
-                       interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
-                                     GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
-                                     GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
-                                     GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
-                                     GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
-                                     GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
-                                     GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
-                                     GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
-                                     GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
-                                     GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
-                                     GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
-                                     GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
-                                     GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
-                                     GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
-                                     GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
-                                     GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
                        interrupt-names = "error",
                                          "ch0", "ch1", "ch2", "ch3",
                                          "ch4", "ch5", "ch6", "ch7",
@@ -874,6 +878,40 @@
                        compatible = "renesas,prr";
                        reg = <0 0xff000044 0 4>;
                };
+
+               cmt0: timer@ffca0000 {
+                       compatible = "renesas,r8a7792-cmt0",
+                                    "renesas,rcar-gen2-cmt0";
+                       reg = <0 0xffca0000 0 0x1004>;
+                       interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 124>;
+                       clock-names = "fck";
+                       power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+                       resets = <&cpg 124>;
+
+                       status = "disabled";
+               };
+
+               cmt1: timer@e6130000 {
+                       compatible = "renesas,r8a7792-cmt1",
+                                    "renesas,rcar-gen2-cmt1";
+                       reg = <0 0xe6130000 0 0x1004>;
+                       interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 329>;
+                       clock-names = "fck";
+                       power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+                       resets = <&cpg 329>;
+
+                       status = "disabled";
+               };
        };
 
        timer {