aspeed: ast2500: Fix H-PLL and M-PLL clock rate calculation
[platform/kernel/u-boot.git] / arch / arm / dts / k2g.dtsi
index 00cd492..add03b7 100644 (file)
                        #size-cells = <0>;
                        status = "disabled";
                };
+
+               mmc0: mmc@23000000 {
+                       compatible = "ti,omap4-hsmmc";
+                       reg = <0x23000000 0x400>;
+                       interrupts = <GIC_SPI 96 IRQ_TYPE_EDGE_RISING>;
+                       bus-width = <4>;
+                       ti,needs-special-reset;
+                       no-1-8-v;
+                       max-frequency = <96000000>;
+                       status = "disabled";
+               };
+
+               mmc1: mmc@23100000 {
+                       compatible = "ti,omap4-hsmmc";
+                       reg = <0x23100000 0x400>;
+                       interrupts = <GIC_SPI 97 IRQ_TYPE_EDGE_RISING>;
+                       bus-width = <8>;
+                       ti,needs-special-reset;
+                       ti,non-removable;
+                       max-frequency = <96000000>;
+                       status = "disabled";
+                       clock-names = "fck";
+               };
        };
 };