* Copyright 2019 NXP
*/
+#include "imx8mm-u-boot.dtsi"
+
/ {
binman: binman {
multiple-images;
};
};
-&{/soc@0} {
- u-boot,dm-pre-reloc;
- u-boot,dm-spl;
-};
-
-&clk {
- u-boot,dm-spl;
- u-boot,dm-pre-reloc;
- /delete-property/ assigned-clocks;
- /delete-property/ assigned-clock-parents;
- /delete-property/ assigned-clock-rates;
-};
-
-&osc_24m {
- u-boot,dm-spl;
- u-boot,dm-pre-reloc;
-};
-
-&aips1 {
- u-boot,dm-spl;
- u-boot,dm-pre-reloc;
-};
-
-&aips2 {
- u-boot,dm-spl;
-};
-
-&aips3 {
- u-boot,dm-spl;
-};
-
-&iomuxc {
- u-boot,dm-spl;
-};
-
®_usdhc2_vmmc {
u-boot,off-on-delay-us = <20000>;
};
u-boot,dm-spl;
sd-uhs-sdr104;
sd-uhs-ddr50;
+ fsl,signal-voltage-switch-extra-delay-ms = <8>;
};
&usdhc3 {