imx6ul/imx6ull: synchronise device trees with linux

[platform/kernel/u-boot.git] / arch / arm / dts / imx6ul-phytec-phycore-som.dtsi

diff --git a/arch/arm/dts/imx6ul-phytec-phycore-som.dtsi b/arch/arm/dts/imx6ul-phytec-phycore-som.dtsi
index c2a7c78..3cddc68 100644 (file)
--- a/arch/arm/dts/imx6ul-phytec-phycore-som.dtsi
+++ b/arch/arm/dts/imx6ul-phytec-phycore-som.dtsi
@@ -16,9 +16,13 @@
                stdout-path = &uart1;
        };
 
-       memory {
+       /*
+        * Set the minimum memory size here and
+        * let the bootloader set the real size.
+        */
+       memory@80000000 {
                device_type = "memory";
-               reg = <0x80000000 0x20000000>;
+               reg = <0x80000000 0x8000000>;
        };
 
        gpio_leds_som: leds {
@@ -64,13 +68,17 @@
 };
 
 &i2c1 {
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c1>;
+       pinctrl-1 = <&pinctrl_i2c1_gpio>;
+       scl-gpios = <&gpio1 28 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+       sda-gpios = <&gpio1 29 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
        clock-frequency = <100000>;
        status = "okay";
 
        eeprom@52 {
                compatible = "catalyst,24c32", "atmel,24c32";
+               pagesize = <32>;
                reg = <0x52>;
        };
 };
@@ -142,6 +150,13 @@
                >;
        };
 
+       pinctrl_i2c1_gpio: i2cgpiogrp {
+               fsl,pins = <
+                       MX6UL_PAD_UART4_TX_DATA__GPIO1_IO28     0x4001b8b0
+                       MX6UL_PAD_UART4_RX_DATA__GPIO1_IO29     0x4001b8b0
+               >;
+       };
+
        pinctrl_uart1: uart1grp {
                fsl,pins = <
                        MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX   0x1b0b1