Merge https://gitlab.denx.de/u-boot/custodians/u-boot-spi
[platform/kernel/u-boot.git] / arch / arm / dts / fsl-ls2088a-rdb-qspi.dts
index c8bf9a0..16b9aee 100644 (file)
        };
 };
 
+&dpmac1 {
+       status = "okay";
+       phy-handle = <&mdio1_phy1>;
+       phy-connection-type = "xfi";
+};
+
+&dpmac2 {
+       status = "okay";
+       phy-handle = <&mdio1_phy2>;
+       phy-connection-type = "xfi";
+};
+
+&dpmac3 {
+       status = "okay";
+       phy-handle = <&mdio1_phy3>;
+       phy-connection-type = "xfi";
+};
+
+&dpmac4 {
+       status = "okay";
+       phy-handle = <&mdio1_phy4>;
+       phy-connection-type = "xfi";
+};
+
+&dpmac5 {
+       status = "okay";
+       phy-handle = <&mdio2_phy1>;
+       phy-connection-type = "xfi";
+};
+
+&dpmac6 {
+       status = "okay";
+       phy-handle = <&mdio2_phy2>;
+       phy-connection-type = "xfi";
+};
+
+&dpmac7 {
+       status = "okay";
+       phy-handle = <&mdio2_phy3>;
+       phy-connection-type = "xfi";
+};
+
+&dpmac8 {
+       status = "okay";
+       phy-handle = <&mdio2_phy4>;
+       phy-connection-type = "xfi";
+};
+
+&emdio1 {
+       status = "okay";
+
+       /* CS4340 PHYs */
+       mdio1_phy1: emdio1_phy@1 {
+               reg = <0x10>;
+       };
+       mdio1_phy2: emdio1_phy@2 {
+               reg = <0x11>;
+       };
+       mdio1_phy3: emdio1_phy@3 {
+               reg = <0x12>;
+       };
+       mdio1_phy4: emdio1_phy@4 {
+               reg = <0x13>;
+       };
+};
+
+&emdio2 {
+       status = "okay";
+
+       /* AQR405 PHYs */
+       mdio2_phy1: emdio2_phy@1 {
+               compatible = "ethernet-phy-ieee802.3-c45";
+               reg = <0x0>;
+       };
+       mdio2_phy2: emdio2_phy@2 {
+               compatible = "ethernet-phy-ieee802.3-c45";
+               reg = <0x1>;
+       };
+       mdio2_phy3: emdio2_phy@3 {
+               compatible = "ethernet-phy-ieee802.3-c45";
+               reg = <0x2>;
+       };
+       mdio2_phy4: emdio2_phy@4 {
+               compatible = "ethernet-phy-ieee802.3-c45";
+               reg = <0x3>;
+       };
+};
+
 &dspi {
        bus-num = <0>;
        status = "okay";
        dflash0: n25q512a {
                #address-cells = <1>;
                #size-cells = <1>;
-               compatible = "spi-flash";
+               compatible = "jedec,spi-nor";
                spi-max-frequency = <3000000>;
                spi-cpol;
                spi-cpha;
        qflash0: s25fs512s@0 {
                #address-cells = <1>;
                #size-cells = <1>;
-               compatible = "spi-flash";
+               compatible = "jedec,spi-nor";
                spi-max-frequency = <50000000>;
                reg = <0>;
        };
        qflash1: s25fs512s@1 {
                #address-cells = <1>;
                #size-cells = <1>;
-               compatible = "spi-flash";
+               compatible = "jedec,spi-nor";
                spi-max-frequency = <50000000>;
                reg = <1>;
        };
 };
+
+&i2c0 {
+       status = "okay";
+       u-boot,dm-pre-reloc;
+
+       pca9547@75 {
+               compatible = "nxp,pca9547";
+               reg = <0x75>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+                i2c@1 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <0x01>;
+                       rtc@68 {
+                               compatible = "dallas,ds3232";
+                               reg = <0x68>;
+                       };
+               };
+       };
+};
+
+&sata {
+       status = "okay";
+};