Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq

[platform/kernel/u-boot.git] / arch / arm / dts / fsl-ls1046a.dtsi

diff --git a/arch/arm/dts/fsl-ls1046a.dtsi b/arch/arm/dts/fsl-ls1046a.dtsi
index 7687d12..3f11d6c 100644 (file)
--- a/arch/arm/dts/fsl-ls1046a.dtsi
+++ b/arch/arm/dts/fsl-ls1046a.dtsi
@@ -31,7 +31,7 @@
                interrupts = <1 9 0xf08>;
        };
 
-       soc {
+       soc: soc {
                compatible = "simple-bus";
                #address-cells = <2>;
                #size-cells = <2>;
@@ -211,14 +211,12 @@
                };
 
                qspi: quadspi@1550000 {
-                       compatible = "fsl,vf610-qspi";
+                       compatible = "fsl,ls1021a-qspi";
                        #address-cells = <1>;
                        #size-cells = <0>;
                        reg = <0x0 0x1550000 0x0 0x10000>,
                                <0x0 0x40000000 0x0 0x10000000>;
                        reg-names = "QuadSPI", "QuadSPI-memory";
-                       num-cs = <4>;
-                       big-endian;
                        status = "disabled";
                };
 
@@ -259,6 +257,17 @@
                                  0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
                };
 
+               pcie_ep@3400000 {
+                       compatible = "fsl,ls-pcie-ep";
+                       reg = <0x00 0x03400000 0x0 0x80000
+                              0x00 0x034c0000 0x0 0x40000
+                              0x40 0x00000000 0x8 0x00000000>;
+                       reg-names = "regs", "ctrl", "addr_space";
+                       num-ib-windows = <6>;
+                       num-ob-windows = <8>;
+                       big-endian;
+               };
+
                pcie@3500000 {
                        compatible = "fsl,ls-pcie", "snps,dw-pcie";
                        reg = <0x00 0x03500000 0x0 0x80000   /* dbi registers */
@@ -276,6 +285,17 @@
                                  0x82000000 0x0 0x40000000 0x48 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
                };
 
+               pcie_ep@3500000 {
+                       compatible = "fsl,ls-pcie-ep";
+                       reg = <0x00 0x03500000 0x0 0x80000
+                              0x00 0x035c0000 0x0 0x40000
+                              0x48 0x00000000 0x8 0x00000000>;
+                       reg-names = "regs", "ctrl", "addr_space";
+                       num-ib-windows = <6>;
+                       num-ob-windows = <8>;
+                       big-endian;
+               };
+
                pcie@3600000 {
                        compatible = "fsl,ls-pcie", "snps,dw-pcie";
                        reg = <0x00 0x03600000 0x0 0x80000   /* dbi registers */
@@ -291,5 +311,26 @@
                        ranges = <0x81000000 0x0 0x00000000 0x50 0x00020000 0x0 0x00010000   /* downstream I/O */
                                  0x82000000 0x0 0x40000000 0x50 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
                };
+
+               pcie_ep@3600000 {
+                       compatible = "fsl,ls-pcie-ep";
+                       reg = <0x00 0x03600000 0x0 0x80000
+                              0x00 0x036c0000 0x0 0x40000
+                              0x50 0x00000000 0x8 0x00000000>;
+                       reg-names = "regs", "ctrl", "addr_space";
+                       num-ib-windows = <6>;
+                       num-ob-windows = <8>;
+                       big-endian;
+               };
+
+               sata: sata@3200000 {
+                       compatible = "fsl,ls1046a-ahci";
+                       reg = <0x0 0x3200000 0x0 0x10000 /* ccsr sata base */
+                              0x0 0x20140520 0x0 0x4>;  /* ecc sata addr*/
+                       reg-names = "sata-base", "ecc-addr";
+                       interrupts = <0 69 4>;
+                       clocks = <&clockgen 4 1>;
+                       status = "disabled";
+               };
        };
 };