Merge tag 'u-boot-atmel-fixes-2021.01-b' of https://gitlab.denx.de/u-boot/custodians...

[platform/kernel/u-boot.git] / arch / arm / dts / fsl-ls1046a.dtsi

diff --git a/arch/arm/dts/fsl-ls1046a.dtsi b/arch/arm/dts/fsl-ls1046a.dtsi
index 4e91d5c..155455d 100644 (file)
--- a/arch/arm/dts/fsl-ls1046a.dtsi
+++ b/arch/arm/dts/fsl-ls1046a.dtsi
@@ -211,14 +211,12 @@
                };
 
                qspi: quadspi@1550000 {
-                       compatible = "fsl,vf610-qspi";
+                       compatible = "fsl,ls1021a-qspi";
                        #address-cells = <1>;
                        #size-cells = <0>;
                        reg = <0x0 0x1550000 0x0 0x10000>,
                                <0x0 0x40000000 0x0 0x10000000>;
                        reg-names = "QuadSPI", "QuadSPI-memory";
-                       num-cs = <4>;
-                       big-endian;
                        status = "disabled";
                };
 
@@ -243,7 +241,7 @@
                        dr_mode = "host";
                };
 
-               pcie@3400000 {
+               pcie1: pcie@3400000 {
                        compatible = "fsl,ls-pcie", "snps,dw-pcie";
                        reg = <0x00 0x03400000 0x0 0x80000   /* dbi registers */
                               0x00 0x03480000 0x0 0x40000   /* lut registers */
@@ -259,7 +257,18 @@
                                  0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
                };
 
-               pcie@3500000 {
+               pcie_ep1: pcie_ep@3400000 {
+                       compatible = "fsl,ls-pcie-ep";
+                       reg = <0x00 0x03400000 0x0 0x80000
+                              0x00 0x034c0000 0x0 0x40000
+                              0x40 0x00000000 0x8 0x00000000>;
+                       reg-names = "regs", "ctrl", "addr_space";
+                       num-ib-windows = <6>;
+                       num-ob-windows = <8>;
+                       big-endian;
+               };
+
+               pcie2: pcie@3500000 {
                        compatible = "fsl,ls-pcie", "snps,dw-pcie";
                        reg = <0x00 0x03500000 0x0 0x80000   /* dbi registers */
                               0x00 0x03580000 0x0 0x40000   /* lut registers */
@@ -276,7 +285,18 @@
                                  0x82000000 0x0 0x40000000 0x48 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
                };
 
-               pcie@3600000 {
+               pcie_ep2: pcie_ep@3500000 {
+                       compatible = "fsl,ls-pcie-ep";
+                       reg = <0x00 0x03500000 0x0 0x80000
+                              0x00 0x035c0000 0x0 0x40000
+                              0x48 0x00000000 0x8 0x00000000>;
+                       reg-names = "regs", "ctrl", "addr_space";
+                       num-ib-windows = <6>;
+                       num-ob-windows = <8>;
+                       big-endian;
+               };
+
+               pcie3: pcie@3600000 {
                        compatible = "fsl,ls-pcie", "snps,dw-pcie";
                        reg = <0x00 0x03600000 0x0 0x80000   /* dbi registers */
                               0x00 0x03680000 0x0 0x40000   /* lut registers */
@@ -292,6 +312,17 @@
                                  0x82000000 0x0 0x40000000 0x50 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
                };
 
+               pcie_ep3: pcie_ep@3600000 {
+                       compatible = "fsl,ls-pcie-ep";
+                       reg = <0x00 0x03600000 0x0 0x80000
+                              0x00 0x036c0000 0x0 0x40000
+                              0x50 0x00000000 0x8 0x00000000>;
+                       reg-names = "regs", "ctrl", "addr_space";
+                       num-ib-windows = <6>;
+                       num-ob-windows = <8>;
+                       big-endian;
+               };
+
                sata: sata@3200000 {
                        compatible = "fsl,ls1046a-ahci";
                        reg = <0x0 0x3200000 0x0 0x10000 /* ccsr sata base */